Template Revision 2.2 - on construction

Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board"

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Important General Note:

  • Export PDF to download, if vivado revision is changed!

  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Create DrawIO object here: Attention if you copy from other page, use

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

        Note: for normal pictures remove Scroll ignore and Scoll only macro

      • Table template:

        • Layout macro can be use for landscape of large tables
        • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)
      • ExampleComment
        12
  • ...

Table of contents

Overview

Notes :

Basic project to generate SDSoC Platform project and petalinux. Various SDSoC examples are included.

Refer to http://trenz.org/te0xyz-info for the current online version of this manual and other available documentation.

Key Features

Notes :

  • Add basic key futures, which can be tested with the design
  • SDSoC platform export
  • SDSoC examples (baremetal and linux)

Revision History

Notes :

  • add every update file on the download
  • add design changes on description

DateVivadoProject BuiltAuthorsDescription
2018-11-062018.2TE0808-SK0808_zusys_SDSoC-vivado_2018.2-build_03_20181106095111.zipZdenek Pohl, Jiri Kadlecinitial release

Release Notes and Know Issues

Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed

IssuesDescriptionWorkaroundTo be fixed version
No known issues---------

Requirements

Software

Notes :

  • list of software which was used to generate the design

SoftwareVersionNote
SDx(SDSoC)2018.2needed
PetaLinux2018.2needed

Hardware

Notes :

  • list of software which was used to generate the design

Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TE0808-ES1 es1_skREV02, REV032GB64MB
Xilinx has stopped ES1 support with 2018.2, please use 2017.4 reference design
TE0808-ES2 es2_skREV03, REV042GB64MB

TE0808-2ES2 2es2_skREV03, REV042GB64MB

TE0808-04-09EG-1EA9eg_1ea_skREV042GB64MB

TE0808-04-09EG-1EB9eg_1eb_skREV044GB64MB

TE0808-04-09EG-1ED9eg_1eb_skREV044GB64MB1,0 mm connector
TE0808-04-09EG-1EE9eg_1eb_skREV044GB128MB

TE0808-04-09EG-1EL9eg_1eb_skREV044GB128MB1,0 mm connector
TE0808-04-09EG-2IB9eg_2ib_skREV044GB64MB

TE0808-04-09EG-2IE9eg_2ib_skREV044GB128MB

TE0808-04-06EG-1EE6eg_1ee_skREV044GB128MB

TE0808-04-06EG-1E36eg_1ee_skREV044GB128MB1,0 mm connector
TE0808-04-15EG-1EB15eg_1eb_skREV044GB64MB

TE0808-04-15EG-1EE15eg_1eb_skREV044GB128MB

Design supports following carriers:

Carrier ModelNotes
TEBF0808---

Additional HW Requirements:

Additional HardwareNotes
MiniUSB Cable for JTAG/UARTCheck Carrier Board and Programmer for correct type
XMOD ProgrammerCarrier Board dependent, only if carrier has no own FTDI
CoolerIt's recommended to use cooler on ZynqMP device

Content

Notes :

  • content of the zip file

For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
Vivado Project will be generated by TE Scripts
SDK/HSI<design name>/sw_libAdditional Software Template for SDK/HSI and apps_list.csv with settings for HSI
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration
SDSoC<design name>/../SDSoC_PFMSDSoC Platform will be generated by TE Scripts or as separate download

Additional Sources

TypeLocationNotes
SI5345<design name>/misc/Si5345SI5345 Project with current PLL Configuration


Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

Basic Reference Design and SDSoC Platform projects for Win OS are available on:

Create SDSoC Platform Project

Notes :

  • describe how you can create platform project with the normal vivado projects and TE scripts

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

This chapter describes how you can create SDSoC platform project from special Trenz Electronik Vivado projects.

This chapter is optional: Prebuilt SDSoC platform projects are also available on the download area.

Vivado SDSoc Platform export

Notes :

  • procedure to create platform project
  1. Download and unpack package (use short path or 'subst' command to make path as short as possible).
  2. Run '_create_win_setup.cmd' script and choose option '1'
  3. Edit file 'design_basic_settings.cmd' and fill correctly all variables, set ENABLE_SDSOC=1. 
  4. Launch Vivado by command 'vivado_create_project_guimode.cmd'
  5. In Vivado: 
    1. run script in TCL console
      TE::hw_build_design -export_prebuilt
  6. (Optional) Build Petalinux:
    1. Copy OS folder from downloaded package to Linux PC.
    2. Copy hdf file located in prebuilt/hardware/<shortname> subfolder to Linux PC
    3. Switch to Linux PC and run in terminal:
      1. Initialize Petalinux SDK:
        source <petalinux_SDK_install_path>/settings.sh
      2. Use hdf file to configure linux project:
        petalinux-config -p <path_to_petalinux_project> --get-hw-description
      3. Build petalinux image from within the project:
        petalinux-build
      4. Repeat previous step until images are sucessfully created. It may take from 1 to 5 attempts.
      5. Find linux images and copy them back to the Trenz package
        Files to be copied are located in <petalinux_project_path>/images/linux. Filenames are:
        image.ub, u-boot.elf, bl31.elf
        Target folder in Trenz package is:
        prebuilt/os/petalinux/default for all 1GB DDR modules.
        or
        prebuilt/os/petalinux/<shortname> for both supported 2GB DDR modules
      6. Return back to Vivado
  7. In Vivado:
    1. run script in TCL console
      TE::sw_run_hsi
    2. run script in TCL console
      TE::ADV::beta_util_sdsoc_project
  8. Custom platform for SDx tool is now exported to SDSoC_PFM folder sitting next to Trenz package folder

SDK/HSI Application

Notes :

  • add name of app and short description, if special app is used
  • For FSBL check if default or not and add changes!

Source location: \sw_lib\sw_apps

zynqmp_fsbl

TE modified 2018.2 FSBL

Changes:

Removecompiler flags "-Os -flto -ffat-lto-objects" on 2018.2 SDK to generate FSBL

zynqmp_fsbl_flash

TE modified 2018.2 FSBL for QSPI programming only (SDK(Vivado GUI)

Changes:

Remove compiler flags "-Os -flto -ffat-lto-objects" on 2018.2 SDK to generate FSBL

zynqmp_pmufw

Xilinx default PMU firmware.


hello_te0808

Hello TE0808 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Petalinux Configuration

Notes :

  • add manual changes, which was done on the petalinux project 

UConfig

U-boot

Device Tree

/include/ "system-conf.dtsi"
/ {
};

/* default */

/* SD */

&sdhci1 {
	// disable-wp;
	no-1-8-v;

};

/* USB  */

&dwc3_0 {
    status = "okay";
    dr_mode = "host";
};

/* ETH PHY */

&gem3 {
	phy-handle = <&phy0>;
	phy0: phy0@1 {
		device_type = "ethernet-phy";
		reg = <1>;
	};
};

/* QSPI */

&qspi {
    #address-cells = <1>;
    #size-cells = <0>;
    status = "okay";
    flash0: flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0x0>;
        #address-cells = <1>;
        #size-cells = <1>;
    };
};

/* I2C */

&i2c0 {
    i2cswitch@73 { // u
        compatible = "nxp,pca9548";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x73>;
        i2c-mux-idle-disconnect;

        i2c@2 { // PCIe
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
        };
        i2c@3 { // i2c SFP
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
        };
        i2c@4 { // i2c SFP
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <4>;
        };
        i2c@5 { // i2c EEPROM
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <5>;
        };
        i2c@6 { // i2c FMC
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <6>;

            si570_2: clock-generator3@5d {
                #clock-cells = <0>;
                compatible = "silabs,si570";
                reg = <0x5d>;
                temperature-stability = <50>;
                factory-fout = <156250000>;
                clock-frequency = <78800000>;
            };
        };
        i2c@7 { // i2c USB HUB
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <7>;
        };
    };
    i2cswitch@77 { // u
        compatible = "nxp,pca9548";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x77>;
        i2c-mux-idle-disconnect;
        i2c@0 { // i2c PMOD
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0>;
        };
        i2c@1 { // i2c Audio Codec
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <1>;
			/*
            adau1761: adau1761@38 {
                compatible = "adi,adau1761";
                reg = <0x38>;
            };
			*/
        };
        i2c@2 { // i2c FireFly A
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
        };
        i2c@3 { // i2c FireFly B
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
        };
        i2c@4 { // i2c PLL
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <4>;
        };
        i2c@5 { // i2c SC
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <5>;
        };
        i2c@6 { // i2c
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <6>;
        };
        i2c@7 { // i2c
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <7>;
        };
    };
};

/* UNUSED DMA disable */

&lpd_dma_chan1 {
    status = "disabled";
};
&lpd_dma_chan2 {
    status = "disabled";
};
&lpd_dma_chan3 {
    status = "disabled";
};
&lpd_dma_chan4 {
    status = "disabled";
};
&lpd_dma_chan5 {
    status = "disabled";
};
&lpd_dma_chan6 {
    status = "disabled";
};
&lpd_dma_chan7 {
    status = "disabled";
};
&lpd_dma_chan8 {
    status = "disabled";
};

/* APF driver for SDSoC.*/
/{
 xlnk {
 compatible = "xlnx,xlnk-1.0";
 };
};

Kernel

Added changes required by SDSoC and described in UG1146 (v2018.2) July 2, 2018

Deactivate:

Activate:

SET

Rootfs

Added changes required by SDSoC and described in UG1146 (v2018.2) July 2, 2018

Activate:

Application

Use SDSoC Platform Project

Included Example

Notes :

  • short description of the examples
  • Maybe List or table is also possible, which seems to be better

ExampleComment
Array partitionThis example shows how to use array partitioning to improve performance of a hardware function

Burst rw

This is simple example of using AXI4-master interface for burst read and write

Custom data type

This is a simple example of RGB to HSV conversion to demonstrate Custom Data Type usage in hardware accelerator. Xilinx HLS compiler supports custom data type to operate within the hardware function and also it acts as a memory interface between PL to DDR

Data access random

This is a simple example of matrix multiplication (Row x Col) to demonstrate random data access pattern

Dependence inter

This is a simple example to demonstrate inter dependence attribute. Using inter dependence attribute user can provide additional dependency details to compiler which allow compiler to perform unrolling/pipelining to get better performance.

Direct connect

This is a simple example of matrix multiplication with matrix addition (Out = (A x B) + C) to demonstrate direct connection which helps to achieve increasing in system parallelism and concurrency

Dma sg

This example demonstrates how to use Scatter-Gather DMAs for data transfer to/from hardware accelerator

Dma simple

This example demonstrates how to insert Simple DMAs for data transfer between User program and hardware accelerator

File IO Dense Optical Flow

Linux video processing application that reads input video from a file and writes out the output video to a file. Video processing performs LK Dense Optical Flow over two Full HD frames video file. You can run it by supplying a 1080p YUV422 file route85_1920x1080.yuv as input.

File IO Stereo Block Matching

Linux video processing application that reads input video from a file and writes out the output video to a file. Video processing performs Stereo Block Matching to calculate depth in a single sample stereo video file desk_1280x720.yuv as input.

File IO Video Processing

Linux video processing application that reads input video from a file and writes out the output video to a file. Video processing includes Motion Adaptive Noise Reduction (MANR) followed by a Sobel filter for edge detection. You can run it by supplying a 1080p YUV422 file as input with limiting number of frames to a maximum of 20 frames.

Full array 2d

This is a simple example of accessing full data from 2D array

Hello vadd

This is a basic hello world kind of example which demonstrates how to achieve vector addition using hardware function

Lmem 2rw

This is a simple example of vector addition to demonstrate how to utilize both ports of Local Memory

Loop fusion

This example will demonstrate how to fuse two loops into one to improve the performance of a C/C++ hardware function.

Loop perfect

This nearest neighbor example is to demonstrate how to achieve better performance using perfect loop.

Loop pipeline

This example demonstrates how loop pipelining can be used to improve the performance of a hardware function.

Loop reorder

This is a simple example of matrix multiplication (Row x Col) to demonstrate how to achieve better pipeline II factor by loop reordering.

Row array 2D

This is a simple example of accessing each row of data from 2D array

Shift register

This example demonstrates how to shift values in each clock cycle

Sys port

This is a simple example which demonstrates sys_port usage

Systolic array

Matrix multiplication implemented as systolic array

Wide memory rw

Wide memory read write 128 bit wide

Window array 2d

This is a simple example of accessing window of data from 2D array

Create Example

Notes :

  • Steps to create an example
  1. Start SDx 2018.2
  2. Select Workspace folder, short path is recommended. Use 'subst' command if needed.
    Click "Create SDx Project"
    1. Choose 'Application' project type
    2. Set Project Name (example: mmult)
    3. Set Platform:
      1. Click 'Add Custom Platform ...'
      2. Add SDSoC_PFM folder
      3. Click next
    4. Select 'System configuration': Linux
    5. Click "Next"
    6. Select Template Application, example:'Array partition'  
    7. Click "Finish"
    8. Right click project <project name>, example:'mmult' in the Project Explorer window and choose 'Build'
    9. The SDSoC project is compiled (ca 30 min) hw accelerated matrix multiplication. 
      SDCard image is created

Launch

Notes :

  • Steps to launch on hardware
  1. Copy created files to the SD card.
  2. Connect serial terminal via the USB cable.
  3. Power ON carrier.
  4. On PC, open serial terminal.
  5. Reset carrier.
  6. Boot of Linux starts up to login stage. Login as 'root' with password 'root'.
  7. Use serial terminal:
    1. cd to /run/media/mmcblk0p1
    2. execute mmult.elf or other example application
    3. Observe the result of accelerated matrix multiplication example.

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number

    • Metadata is only used of compatibility of older exports

DateDocument Revision

Authors

Description

  • description update

v.9UTIA
  • change list
--all

--

Legal Notices