Template Revision 2.1 - on construction Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board" |
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Important General Note: Export PDF to download, if vivado revision is changed! Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro - Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
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Table of contents |
Overview
Zynq PS Design with Linux Example.
Refer to http://trenz.org/te0726-info for the current online version of this manual and other available documentation.
Key Features
Notes : - Add basic key futures, which can be tested with the design
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- PetaLinux
- SD
- ETH
- USB
- I2C
- Special FSBL for QSPI programming
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Revision History
Notes : - add every update file on the download
- add design changes on description
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Date | Vivado | Project Built | Authors | Description |
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2018-10-31 | 2018.2 | ... | ... | |
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Release Notes and Know Issues
Notes :- add known Design issues and general notes for the current revision
- do not delete known issue, add fixed version time stamp if issue fixed
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Issues | Description | Workaround | To be fixed version |
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No known issues | --- | --- | --- |
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Requirements
Software
Notes : - list of software which was used to generate the design
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Software | Version | Note |
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Vivado | 2018.2 | needed | SDK | 2018.2 | needed | PetaLinux | 2018.2 | needed |
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Hardware
Notes : - list of software which was used to generate the design
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Basic description of TE Board Part Files is available on TE Board Part Files.
Complete List is available on <design name>/board_files/*_board_files.csv
Design supports following modules:
Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
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te0726-01 | 01 | REV01 | 64MB LPDDR2 | 16MB |
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| te0726-03r | r | REV02, REV03 | 128MB DDR3L | 16MB |
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| te0726-03m | m | REV02, REV03 | 512MB DDR3L | 16MB |
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| te0726-03-07s-1c | 7s | REV03 | 512MB DDR3L | 16MB |
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Design supports following carriers:
Additional HW Requirements:
Additional Hardware | Notes |
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USB Cable | Connect to USB2 or better USB3 Hub for proper power supply over USB |
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Content
For general structure and of the reference design, see Project Delivery
Design Sources
Type | Location | Notes |
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Vivado | <design name>/block_design <design name>/constraints <design name>/ip_lib | Vivado Project will be generated by TE Scripts | SDK/HSI | <design name>/sw_lib | Additional Software Template for SDK/HSI and apps_list.csv with settings for HSI | PetaLinux | <design name>/os/petalinux | PetaLinux template with current configuration | SDSoC | <design name>/../SDSoC_PFM | SDSoC Platform will be generated by TE Scripts or as separate download |
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Additional Sources
Type | Location | Notes |
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init.sh | <design name>/misc/init_script | Additional Initialization Script for Linux |
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Prebuilt
Notes : - prebuilt files
- Template Table:
File | File-Extension | Description |
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BIF-File | *.bif | File with description to generate Bin-File | BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) | BIT-File | *.bit | FPGA (PL Part) Configuration File | DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface | Debian SD-Image | *.img | Debian Image for SD-Card | Diverse Reports | --- | Report files in different formats | Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI and PetaLinux | LabTools Project-File | *.lpr | Vivado Labtools Project File | MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) | MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) | OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) | Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems | SREC-File | *.srec | Converted Software Application for MicroBlaze Processor Systems |
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File | File-Extension | Description |
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BIF-File | *.bif | File with description to generate Bin-File | BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) | BIT-File | *.bit | FPGA (PL Part) Configuration File | DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface | Diverse Reports | --- | Report files in different formats | Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI and PetaLinux | LabTools Project-File | *.lpr | Vivado Labtools Project File | OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) | Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Download
Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.
Reference Design is available on:
Design Flow
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch. |
Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality
- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter for minimum setup
- (optional Win OS) Generate Virtual Drive or use short directory for the reference design (for example x:\<design name>)
- Create Project
- Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
Note: Select correct one, see TE Board Part Files
- Create HDF and export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
- Create Linux (uboot.elf and image.ub) with exported HDF
- HDF is exported to "prebuilt\hardware\<short name>"
Note: HW Export from Vivado GUI create another path as default workspace. - Create Linux images on VM, see PetaLinux KICKstart
- Use TE Template from /os/petalinux
Note: run init_config.sh before you start petalinux config. This will set correct temporary path variable. - For 128MB and 64MB only:Netboot Offset must be reduced manually, see Config
- Add Linux files (uboot.elf and image.ub) to prebuilt folder
- "prebuilt\os\petalinux\default" or "prebuilt\os\petalinux\<short name>"
Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\default"
- Generate Programming Files with HSI/SDK
- Run on Vivado TCL: TE::sw_run_hsi
Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" - (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
Note: See SDK Projects
Launch
Note: - Programming and Startup procedure
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Programming
Check Module and Carrier TRMs for proper HW configuration before you try any design. |
Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging
QSPI
- Connect JTAG and power on carrier with module
- Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
- Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp u-boot
Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setup
optional "TE::pr_program_flash_binfile -swapp hello_te0726" possible - Copy image.ub on SD-Card
- For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
- Insert SD-Card
SD
Xilinx Zynq devices in CLG225 package do not support SD Card boot directly from ROM bootloader. Use QSPI for primary boot and SD for secondary boot (uboot)
JTAG
Not used on this Example.
Usage
- Prepare HW like described on section Programming
- Connect UART USB (most cases same as JTAG)
- Insert SD Card with image.ub
- Power On PCB
Note: 1. Zynq Boot ROM loads FSBL from QSPI into OCM, 2. FSBL loads U-boot from QSPI into DDR, 3. U-boot load Linux from SD into DDR
Linux
- Open Serial Console (e.g. putty)
- Speed: 115200
- COM Port: Win OS, see device manager, Linux OS see dmesg |grep tty (UART is *USB1)
- Linux Console:
Note: Wait until Linux boot finished For Linux Login use:
- User Name: root
- Password: root
- You can use Linux shell now.
- I2C 1 Bus type: i2cdetect -y -r 5
Bus 0...5 possible - ETH0 works with udhcpc
- USB: insert USB device
System Design - Vivado
Block Design
PS Interfaces
Activated interfaces:
Type | Note |
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DDR | --- | QSPI | MIO | USB0 | MIO, ETH over USB | SD1 | MIO | UART1 | MIO | I2C1 | MIO | GPIO | MIO | USB RST | MIO | TTC0..1 | MIO | WDT | MIO |
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Constrains
Basic module constrains
#
# Common BITGEN related settings for TE0726
#
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] |
Design specific constrain
Software Design - SDK/HSI
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For SDK project creation, follow instructions from:
SDK Projects
Application
SDK template in ./sw_lib/sw_apps/ available.
zynqmp_fsbl
Xilinx default FSBL
zynqmp_fsbl_flash
TE modified 2018.2 FSBL
Changes:
- Set FSBL Boot Mode to JTAG
- Disable Memory initialization
u-boot
U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.
hello_te0726
Hello TE0726 is a Xilinx Hello World example as endless loop instead of one console output.
Software Design - PetaLinux
For PetaLinux installation and project creation, follow instructions from:
Commands and actions used to create petalinux project
- petalinux-create -t project -n petalinux --template zynq
- copy hdf file to petalinux directory
- cd petalinux
- petalinux-config --get-hw-description
- leave default configuration and select "<Exit>"
- petalinux-create -t apps -n startup --enable
- copy/create startup app files
- petalinux-create -t apps -n rpicam --enable
- copy/create rpicam app files
- petalinux-create -t modules -n te-audio-codec --enable
- copy/create te-audio-codec module files
- copy/modify project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi
- petalinux-config -c rootfs
- Enable Filesystem Packages → Base → i2c-tools → i2c-tools and other apps needed for your system
- Save configuration and exit config
- petalinux-config -c kernel
- CONFIG_USB_USBNET
- CONFIG_USB_NET_SMSC95XX
- CONFIG_USBIP_CORE
- CONFIG_FB_SIMPLE
- petalinux-build
Config
For 64MB variant only:
- CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x2000000
For 128MB variant only:
- CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x4000000
U-Boot
No changes.
Device Tree
/include/ "system-conf.dtsi"
/ {
};
/ {
#address-cells = <1>;
#size-cells = <1>;
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
hdmi_fb_reserved_region@1FC00000 {
compatible = "removed-dma-pool";
no-map;
// 512M (M modules)
reg = <0x1FC00000 0x400000>;
// 128M (R modules)
//reg = <0x7C00000 0x400000>;
};
camera_fb_reserved_region@1F800000 {
compatible = "removed-dma-pool";
no-map;
// 512M (M modules)
reg = <0x1F800000 0x400000>;
// 128M (R modules)
//reg = <0x7800000 0x400000>;
};
};
hdmi_fb: framebuffer@0x1FC00000 { // HDMI out
compatible = "simple-framebuffer";
// 512M (M modules)
reg = <0x1FC00000 (1280 * 720 * 4)>; // 720p
// 128M (R modules)
//reg = <0x7C00000 (1280 * 720 * 4)>; // 720p
width = <1280>; // 720p
height = <720>; // 720p
stride = <(1280 * 4)>; // 720p
format = "a8b8g8r8";
status = "okay";
};
camera_fb: framebuffer@0x1F800000 { // CAMERA in
compatible = "simple-framebuffer";
// 512M (M modules)
reg = <0x1F800000 (1280 * 720 * 4)>; // 720p
// 128M (R modules)
//reg = <0x7800000 (1280 * 720 * 4)>; // 720p
width = <1280>; // 720p
height = <720>; // 720p
stride = <(1280 * 4)>; // 720p
format = "a8b8g8r8";
};
vcc_3V3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vccaux-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
partition@0x00000000 {
label = "boot";
reg = <0x00000000 0x00500000>;
};
partition@0x00500000 {
label = "bootenv";
reg = <0x00500000 0x00020000>;
};
partition@0x00520000 {
label = "kernel";
reg = <0x00520000 0x00a80000>;
};
partition@0x00fa0000 {
label = "spare";
reg = <0x00fa0000 0x00000000>;
};
};
};
/*
* We need to disable Linux VDMA driver as VDMA
* already configured in FSBL
*/
&video_in_axi_vdma_0 {
status = "disabled";
};
&video_out_axi_vdma_0 {
status = "disabled";
};
&video_out_v_tc_0 {
//xilinx-vtc: probe of 43c20000.v_tc failed with error -2
status = "disabled";
};
&gpio0 {
interrupt-controller;
#interrupt-cells = <2>;
};
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
i2cmux0: i2cmux@70 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c1@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
id_eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
};
};
i2c1@1 { // Display Interface Connector
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c1@2 { // HDMI Interface Connector
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c1@3 { // Camera Interface Connector
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
/{
usb_phy0: usb_phy@0 {
compatible = "ulpi-phy";
#phy-cells = <0>;
reg = <0xe0002000 0x1000>;
view-port = <0x0170>;
drv-vbus;
};
};
&usb0 {
usb-phy = <&usb_phy0>;
} ;
/*
* Sound configuration
*/
/{
// Custom driver based on spdif-transmitter
te_audio: dummy_codec_te {
compatible = "te,te-audio";
#sound-dai-cells = <0>;
};
// Simple Audio Card from AXI_I2S and custom XADC audio input and
// PWM audio output cores
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "TE0726-PWM-Audio";
simple-audio-card,format = "i2s";
simple-audio-card,widgets =
"Microphone", "In Jack",
"Line", "Line In Jack",
"Line", "Line Out Jack",
"Headphone", "Out Jack";
simple-audio-card,routing =
"Out Jack", "te-out",
"te-in", "In Jack";
simple-audio-card,cpu {
sound-dai = <&audio_axi_i2s_adi_0>;
};
simple-audio-card,codec {
sound-dai = <&te_audio>;
};
};
};
&audio_axi_i2s_adi_0 {
compatible = "adi,axi-i2s-1.00.a";
reg = <0x43c00000 0x1000>;
clocks = <&clkc 15>, <&clkc 18>; // FCLK_CLK0, FCLK_CLK3
clock-names = "axi", "ref";
dmas = <&dmac_s 0 &dmac_s 1>;
dma-names = "tx", "rx";
#sound-dai-cells = <0>;
};
/*
* We need to disable Linux XADC driver to use XADC for audio recording
*/
&adc {
status = "disabled";
};
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Kernel
Activate:
- CONFIG_XILINX_GMII2RGMII
- CONFIG_USB_USBNET
- CONFIG_USB_NET_SMSC95XX
- CONFIG_USBIP_CORE
- CONFIG_FB_SIMPLE
Deactivate:
Rootfs
Activate:
Applications
startup
Script App to load init.sh from SD Card if available.
See: \os\petalinux\project-spec\meta-user\recipes-apps\startup\files
rpicam
Application used to enable and configure Raspbery Pi camera module
See: \os\petalinux\project-spec\meta-user\recipes-apps\rpicam\files
Kernel Modules
te-audio-codec
Simple module stab to use audio interface.
See: \os\petalinux\project-spec\meta-user\recipes-modules\te-audio-codec\files
Additional Software
Note:
- Add description for other Software, for example SI CLK Builder ...
- SI5338 and SI5345 also Link to:
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No additional software is needed.
Appx. A: Change History and Legal Notices
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Legal Notices