Template Revision 2.3
TRM Name always "TE Series Name" +TRM, for example "TE0720 TRM" |
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Table of Contents |
Overview
Trenz Electronic TE0728 is an automotive-grade FPGA module integrating a Xilinx Automotive Zynq-7020 FPGA, two 100 Mbit Ethernet transceivers (PHY) , 512 MByte DDR3L SDRAM, 16 MByte Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips.
Within the complete module only Automotive components are installed.
All this in a compact 6 x 6 cm form factor, at the most competitive price.
Refer to http://trenz.org/te0728-info for the current online version of this manual and other available documentation.
Key Features
Block Diagram
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Main Components
Notes : - Picture of the PCB (top and bottom side) with labels of important components
- Add List below
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Initial Delivery State
Storage device name | Content | Notes |
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.. | .. | .. | OTP Flash area | Empty | Not programmed. |
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Control Signals
- Overview of Boot Mode, Reset, Enables,
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Signals, Interfaces and Pins
Notes : - For carrier or stand-alone boards use subsection for every connector typ (add designator on description, not on the subsection title), for example:
- For modules which needs carrier us only classes and refer to B2B connector if more than one is used, for example
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Subsections...
On-board Peripherals
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Chip/Interface | IC | PS7 Peripheral |
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SPI Flash | S25FL127SABMFV10 | QSPI0 | 16 MByte Flash |
I2C EEPROM | 24xx64 | I2C0 | 8 KByte EEPROM |
RTC I2C | RV-3029 | I2C0 |
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RTC Interrupt | RV-3029 | GPIO - MIO0 |
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User LED |
| GPIO - MIO7 |
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16 MByte Quad SPI Flash Memory
On-board QSPI flash memory S25FL127SABMFV10 is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
RTC I2C
User LED
512 Mbyte DDR3L SDRAM
Power and Power-On Sequence
Power Consumption
Power Distribution Dependencies
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Power-On Sequence
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Voltage Monitor Circuit
Power Rails
Power Rail Name | B2B Connector JM1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
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VIN | 1, 3 | - | - | Input |
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3.3 | 19 | 2, 4 | - | Output |
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1.8 | 39 | 5 | - | Output |
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Bank Voltages
Board to Board Connectors
FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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13 | JM1 | 48 |
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500 | JM1 | 4 |
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33 | JM3 | 34 |
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35 | JM3 | 20 |
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35 | JM2 | 22 |
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501 | JM2 | 38 |
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Technical Specifications
Absolute Maximum Ratings
Parameter | Min | Max | Units | Reference Document |
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Recommended Operating Conditions
Parameter | Min | Max | Units | Reference Document |
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Physical Dimensions
Variants Currently In Production
Revision History
Hardware Revision History
Date | Revision | Note | PCN | Documentation Link |
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- | 01 | Prototypes | - | - |
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Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Document Change History
- Note this list must be only updated, if the document is online on public doc!
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Date | Revision | Contributor | Description |
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Disclaimer