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Table of Contents |
Overview
Trenz Electronic TE0728 is an automotive-grade FPGA module integrating a Xilinx Automotive Zynq-7020 FPGA, two 100 Mbit Ethernet transceivers (PHY) , 512 MByte DDR3L SDRAM, 16 MByte Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips.
Within the complete module only Automotive components are installed.
All this in a compact 6 x 6 cm form factor, at the most competitive price.
Refer to http://trenz.org/te0728-info for the current online version of this manual and other available documentation.
Key Features
Block Diagram
Main Components
Notes : - Picture of the PCB (top and bottom side) with labels of important components
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- MByte DDR3 SDRAM, Cypress DDR3 Memory, U
- Xilinx ,U2
- 100 MBit Ethernet transceiver, U
- Standard Clock Oscillators @X MHz , U
- Low Dropout Linear Regulator, U
- Real Time Clock, Micro Crystal @X MHz,, U
- MBit Ethernet transceiver, U
- Kbit I2C EEPROM, U
- MByte QSPI Nor Flash memory, U
- Standard Clock Oscillators @X MHz , U
- CAN Tranceiver, U
- B2B connector , JM2
- B2B connector , JM3
- B2B connector , JM1
- User LED
Initial Delivery State
Storage device name | Content | Notes |
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Quad SPI Flash |
| Not Programmed | DDR3 SDRAM |
| Not Programmed | RTC |
| Not Programmed |
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Control Signals
- Overview of Boot Mode, Reset, Enables,
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Boot Process
MODE Signal State | Boot Mode |
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High or open | QSPI |
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Signals, Interfaces and Pins
Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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JTAG Interface
JTAG access to the Xilinx XXXXXXX FPGA through B2B connector JM2.
On-board Peripherals
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Chip/Interface | IC | PS7 Peripheral | Notes |
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Quad SPI Flash Memory
On-board QSPI flash memory S25FL127SABMFV10 is used to store initial FPGA configuration. Datasheet is provided in Texas Instruments. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
Quad SPI Flash (U7) is connected to the Zynq PS QSPI0 interface via PS MIO bank 500.
MIO Pin | Schematic | U13 Pin | Notes |
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RTC
MIO Pin | Schematic | U7 Pin | Notes |
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| SDA |
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| SCL |
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EEPROM
MIO Pin | Schematic | Uxx Pin | Notes |
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| SDA |
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| SCL |
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LEDs
Schematic | Color | Connected to | Active Level | IO Standard |
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DDR3 SDRAM
The TE0728 SoM has XXX GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number:
- Supply voltage:
- Speed:
- NOR Flash
- Temperature:
Ethernet
Schematic | ETH1 | ETH2 | Pullup | Notes |
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CTREF |
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| TD+ |
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| TD- |
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| RD+ |
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| RD- |
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| LED1 |
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| LED2 |
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| LED3 |
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| POWERDOWN/INT |
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| RESET_N |
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CAN Transceiver
MIO Pin | Schematic | U16 Pin | Notes |
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| D |
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| R |
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Low Quiescent Current Programmable Delay Supervisory Circuit
Low Dropout Linear Regulator
Clock Sources
IC | Description | Frequency | Used as |
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| MEMS Oscillator | MHz |
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| MEMS Oscillator | MHz |
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| RTC (internal oscillator) | KHz |
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Power and Power-On Sequence
Power Supply
Power supply with minimum current capability of 3.5 A for system startup is recommended.
Power Consumption
Power Input Pin | Typical Current |
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VIN | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
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Power-On Sequence
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Voltage Monitor Circuit
Power Rails
Power Rail Name | B2B Connector JM1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
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Bank Voltages
Board to Board Connectors
6 x 6 modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.
3 x REF-189018-01 (compatible to SEM-140-02-03.0-H-D-A), (80 pins, "40" per row)
Operating Temperature:-55°C ~ 125°C
Current Rating: 2.6A per ContactNumber of Positions: 80
Number of Rows: 2
Absolute Maximum Ratings
Processing System(PS)
Symbols | Description | Min | Max | Unit |
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VCCPINT | PS internal logic supply voltage | -0.5 | 1.1 | V | VCCPAUX | PS auxiliary supply voltage | -0.5 | 2.0 | V | VCCPLL | PS PLL supply | -0.5 | 2.0 | V | VCCO_DDR | PS DDR I/O supply voltage | -0.5 | 2.0 | V | VPREF | PS input reference voltage | -0.5 | 2.0 | V | VCCO_MIO0 | PS MIO I/O supply voltage for HR I/O banks | -0.5 | 3.6 | V | VCCO_MIO1 | PS MIO I/O supply voltage for HR I/O banks | 1.71 | 3.45 | V |
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Programmable Logic(PL)
Symbols | Description | Min | Max | Unit |
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VCCINT | PL internal logic supply voltage | -0.5 | 1.1 | V | VCCPAUX | PL auxiliary supply voltage | -0.5 | 2.0 | V | VCCPLL | PL PLL supply | -0.5 | 1.1 | V | VPREF | PL input reference voltage | -0.5 | 2.0 | V | VCCO | PL supply voltage for HR I/O banks | -0.5 | 3.6 | V | VIN | I/O input voltage for HR I/O banks | 1.71 | 3.45 | V |
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Technical Specifications
Absolute Maximum Ratings
Parameter | Min | Max | Units | Reference Document |
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VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. | Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. | I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. | Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. | I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. | Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. | I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. | Storage Temperature | -40 | 125 | °C | See Xilinx DS187 datasheet. |
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Recommended Operating Conditions
Commercial grade: 0°C to +70°C.
Industrial and automotive grade: -40°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Parameter | Min | Max | Units | Reference Document |
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VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. | Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. | I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. | Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. | I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. | Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. | I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. | Storage Temperature | -65 | 150 | °C | See Xilinx DS187 datasheet. | CAN Transceiver Temperature | -40 | 125 | °C | See Texas Instrument sn65hvd230q-q1 datasheet. | SPI Flash Memory | -40 | 85 | °C | See Cypress S25FL127S datasheet. | DDR3 SDRAM Temperature | -40 | 95 | °C | See Nanya NT5CC256M16CP-DIA datasheet. |
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Physical Dimensions
Variants Currently In Production
Revision History
Hardware Revision History
Date | Revision | Note | PCN | Documentation Link |
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- | 01 | Prototypes | - | - |
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Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Document Change History
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