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Overview

The Trenz Electronic TE0714 is an industrial-grade SoM (System on Module) based on Xilinx Artix-7, 16 MByte Flash memory and powerful switching mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking strips. TE0714 is the smallest module with transceiver (3 x 4 cm).

Refer to http://trenz.org/te0714-info for the current online version of this manual and other available documentation.

Key Features

• Xilinx Artix-7 FPGA (A15T, A35T, A50T)

• Rugged for shock and high vibration
• 16 MByte QSPI Flash memory
• Differential MEMS oscillator for MGT clocking
• MEMS oscillator for PL clocks (Optional)
• Plug-on module with 2 × 100-pin high-speed hermaphroditic strips
  • 144 FPGA I/O's (Max 68 differential)
  • XADC analog input
  • 4 GTP (high-performance transceiver) lanes
  • GT reference clock inputs
  • Optimized I/O and power pins for good signal integrity
• On-board high-efficiency DC-DC converters
• Power supply for all on-board components
• eFUSE bit-stream encryption (AES)
• One user configurable LED

Different configurations for cost and performance optimization available upon request. Available options are:

• FPGA Type (A15T, A35T, A50T), temperature grade
• GT clock frequency (or none if not implemented)
• PL clock frequency and precision (or none if not implemented)
• Config and B14 bank Voltage: 1.8V or 3.3V
• SPI Flash type (or none if not implemented)
• LED Color (or none if not implemented)
• PUDC Pin strapping (pull high or pull down)
• GT power enable pin strapping (default power enabled or disabled)

Block Diagram

Main Components

1. Xilinx Artix-7 FPGA (XC7A series), U4
2. 16 MByte SPI Flash, U7
   
3. B2B connector Samtec Razor Beam™ LSHM-150, JM2
4. B2B connector Samtec Razor Beam™ LSHM-150, JM1
5. 25 MHz oscillator, U8
6. Single output low-dropout linear regulator (1.2V_MGT), U6
   
7. Single output low-dropout linear regulator (1.0V_MGT), U5
8. Low-jitter precision LVDS 125 MHz oscillator (GT Clock), U2
9. Red indication LED, D4
10. Step-down DC-DC converter (1.0V), U1
11. PFET load switch with configurable slew rate (3.3V), Q1
12. Low-power step-down DC-DC converter (1.8V), U3
13. Voltage detector for circuit initialization and timing supervision, U23 

Signals, Interfaces and Pins

JTAG Interface

JTAG access to the Xilinx Artix-7 FPGA device is provided through connector JM1. 

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

Please refer to the Pin-out  tables page for additional information. 

On-board Peripherals

Quad SPI Flash

On-board SPI flash memory S25FL127S (U7) is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the bus width and clock frequency used.

On-board LED

There is one LED on TE0714 module.

Clock

Power and Power-On Sequence

To power-up a module, power supply with minimum current capability of 1A is recommended.

TE0714 needs one single power supply with nominal of 3.3V.

Power Consumption

Actual power consumption depends on the FPGA design and ambient temperature.

Power Distribution Dependencies

Power-On Sequence

There is no specific or special power-on sequence, single power source is needed as VIN, rest of the sequence is automatic.

Power Rails

Bank Voltages

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Physical Dimensions

• Module size: 40 mm × 30 mm.  Please download the assembly diagram for exact numbers.

• Mating height with standard connectors: 8 mm

• PCB thickness: 1.6 mm

• Highest part on PCB: approximately 2.5 mm. Please download the step model for exact numbers.

All dimensions are shown in mm. Additional sketches, drawings and schematics can be found here.

Variants Currently In Production

Revision History

Hardware Revision History

Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

Document Change History

Date Revision Authors Description Updated to TRM version 2.2 Style modifications 19 Sept 2018 v.48 Martin Rohrmüller Updated to TRM version 2.1 Updated B2B Connectors Style modifications 2018-09-17 v.38 Martin Rohrmüller Added power rail section Added Rev 02 Flash PCN Corrected table headings 2018-09-17 v.36 Martin Rohrmüller Update to TRM version 2.0 with DrawIO Figures Added Figure Power Distribution 2018-04-04 v.35 Martin Rohrmüller Corrected clock net designator in table. 2017-05-28 v.27 Jan Kumann Board-to-Board I/O section added. New physical dimensions images. Documents sections rearranged. 2017-03-20 v.26 John Hartfiel Notes on Clocking section. 2017-01-27 v.25 Jan Kumann New block diagram. 2016-12-01 v.17 Jan Kumann Changes in the document structure, few corrections. 2016-11-18 v.14 Thorsten Trenz, Emmanuel Vassilakis Hardware revision 02 specific changes. 2016-06-01 v.9 Antti Lukats Initial version.

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