Template Revision 2.4
- Module: TRM Name always "TE Series Name" +TRM
Example: "TE0728 TRM" - Carrier: TRM Name usually "TEB Series Name" +TRM
Example: "TEB0728 TRM"
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Table of Contents |
Overview
The carrier board TEB0745 was especially designed and developed for the use of Trenz Electronic module TE0745.
Refer to http://trenz.org/teb0745-info for the current online version of this manual and other available documentation.
Key Features
- Form factor 20 cm x 23,1 cm
- Trenz TE0745 Module Socket (3 x Samtec connectors)
- 24V power supply over ARKZ950/2 connecting terminal
- 1 x EMI Network Filter
- 3 x Variable Step Down Regulator Module (VDRM) with head sink
- 2 x Synchronous Buck Regulator
- 1 x XMOD (TE0790) Pin Header (JTAG / UART)
- 1 x Pin Header (JTAG)
- 1 x microSD connector
- 1 x RJ45 Ethernet connector
- 1 x USB Host Connector
- 8 x SFP-Connector
- 6 x Pin Header 50 pol. (FPGA Bank I/O's and Power)
- 6 x Pin Header 12 pol. (FPGA Bank I/O's and Power)
- 1 x battery holder
- 2 x DIP Switch Array (VCC_HR_B / Modi)
- 2 x Button (User / Reset)
- 2 x LED (Green)
Block Diagram
Main Components
Notes : - Picture of the PCB (top and bottom side) with labels of important components
- Add List below
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- SFP+ Connector, J4 J6 J8 J10 J13 J15 J18 J20
- Board to Board Connector (B2B), J1 J2 J3
- RJ45 Gigabit Ethernet connector, J22
- SD card connector, J16
- USB connector, J41
- Push Button, S2 S3
- SDIO port expander, U15
- Power distribution switch, U4
- Battery holder, B1
- Mag I3C power, U26 U12 U5
- Push bottun switch, S1 S4
- Buck regulator, U6 U7
- I2C EEPROM, U33
- Low voltage chanel I2C switch, U16
- Overvoltage, undervoltage, reversesupply protection controller, U13
- EMI suppression filter, U29
- JTAG interface, J12
- Power jack, J31
- 8bit IO expandor for I2C bus, U18 U25
Initial Delivery State
Notes : Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
Storage device name | Content | Notes |
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EEPROM | Not Programmed |
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Configuration Signals
- Overview of Boot Mode, Reset, Enables.
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MODE Signal State | Connect | B2B | Status | Boot Mode |
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BOOTMODE | S1 | J2-133 | Open | QSPI | Short | SD Card |
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Signal | B2B | Note |
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PS_SRST | J2-152 | PS Reset | RST_IN_N | J2-131 | General Reset |
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Signals, Interfaces and Pins
Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
B2B Connector | Interfaces | Number of I/O | Notes |
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J1
| User I/O | 48 singel ended, 24 Differential 2 singel ended | Connected to Bank 13 | 48 singel ended, 24 Differential 2 singel ended | Connected to Bank 12 | JTAG Interface | 5 single ended | TCK, TDI, TMS, TDO, JTAG_EN | SFP+ Connector | 8 Diff | SPF4....7_RX_N/P , SPF4....7_TX_N/P | J2
| Ethernet PHY | 4 Differential |
| 2 single ended | PHY_LED0...1 | USB | 1 Differential | OTG_N/P | Control Signals | 3 single ended | PS_SRST, BOOTMODE, RST_IN_N | Power Control Signal | 2 single ended | PWR_PS_OK, PWR_PL_OK | I2C Bus | 2 single ended | I2C_SDA, I2C_SCL | User I/O | 4 single ended | MIO12...15 | J3
| User I/O | 6 Single ended | MIO46...51 | SD Card Connector | 6 Single ended | SD_CLK, SD_CMD, SD_DAT0...3 (MIO40...45) | SFP+ Connector | 8 Differential | SPF0....3_RX_N/P , SPF0....3_TX_N/P |
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JTAG Interface Base
JTAG access to the TEB0745 SoM is available through B2B connector JB1 and JB2. JTAG_EN is connected to J1-138, JTAG_EN can be activated through DIP Switch S1-B.
Designator | Connected to | B2B Pin | XMOD Header JB1 | Note |
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A | MIO15 | J2-129 | JB1-3 | UART Txd - input | B | MIO14 | J2-127 | JB1-7 | UART Rxd - Output | C | TCK | J1-143 | JB1-4 | JTAG interface signal | D | TDO | J1-145 | JB1-8 | JTAG interface signal | F | TDI | J1-142 | JB1-10 | JTAG interface signal | H | TMS | J1-144 | JB1-12 | JTAG interface signal | G | RST_IN_N | J2-131 | JB1-11 | RESET will be connected to Push Button on JTAG Programmer |
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I2C Addresses
I2C Device | I2C Address | Designator | Notes |
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I2C_EXP | 0x72 | U16 | SFP 0-9 | EEPROM | 0x51 | U33 |
| I/O EXP | 0x20...27 | U18...25 |
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On-board Peripherals
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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SD Card Socket
Power supply voltage for SD card holder is 3.3V.
Signals | Connected to | B2B | Notes |
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SD_CLK | MIO40 | J3-150 |
| SD_CMD | MIO41 | J3-152 |
| SD_DAT0 | MIO42 | J3-154 |
| SD_DAT1 | MIO43 | J3-156 |
| SD_DAT2 | MIO44 | J3-158 |
| SD_DAT3 | MIO45 | J3-160 |
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RJ45 Connector
Etherneth Socket is connected to Board to Board (B2B) JM2.
Signal | B2B | Notes |
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PHY_MDIO0_P | J2-120 |
| PHY_MDIO_N | J2-122 |
| PHY_MDIO1_P | J2-126 |
| PHY_MDIO1_N | J2-128 |
| PHY_MDIO2_P | J2-132 |
| PHY_MDIO2_N | J2-134 |
| PHY_MDIO3_P | J2-138 |
| PHY_MDIO3_N | J2-140 |
| PHY_LED0 | J2-144 |
| PHY_LED1 | J2-146 |
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EEPROM
MIO Pin | Schematic | B2B | Notes |
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MIO10 | I2C_SCL | J2-119 |
| MIO11 | I2C_SDA | J2-121 |
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DIP Switches
There are two DIP Switches S1,S4.
Designator | Connected to | B2B | Note |
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S1A | BootMode | J2-133 |
| S1B | JTAG_EN | J1-148 |
| S1C | - |
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| S1D | PS_SW | J2-123 |
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VCC_HR_B voltage can be selected using DIP Switch S4 .
Output Voltage | 1 | 2 | 3 | 4 | Note |
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1.2V | Off | Off | Off | - |
| 1.5V | On | On | Off | - |
| 1.8V | On | On | On | - |
| 2.5V | On | Off | Off | - |
| 3.3V | On | Off | On | - |
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Push Button
There are two push buttons S2, S3.
Designator | Connected to | B2B | Active Level | Note |
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S3 | USR_BTN | J3-153 | Active high |
| S2 | RST_IN_N | J2-131 | Active high | General Reset |
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LEDs
Designator | Schematic | Color | B2B | Connected to | Note |
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D1 | LED1 | Green | J3-149 | MIO48 |
| D5 | LED2 | Green | J3-151 | MIO49 |
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Power and Power-On Sequence
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: - Power on-sequence
- Power distribution
- Voltage monitoring circuit
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Power Supply
Power supply with minimum current capability of 2.5 A for system startup is recommended.
Power Consumption
Power Input Pin | Typical Current |
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24V | TBD* | VBAT | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
Power-On Sequence
Power Rails
B2B | VCC / VCCIO | Direction | Notes |
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JB1 | 3.3V | IN | PL_VIN | VCC_HR_B | IN | VCCIO_12, VCCIO_13 | JB2 | VCCIO18V | IN | VCCIO_34, VCCIO_35 | PS_1.8V | OUT | PWR_OUT | 3.3V | IN | PS_3.3V | JB3 | VCCIO18V | IN | PWR_IN_VCCIO_33 |
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Board to Board Connectors
- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
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5.2x7.6 SoM has three Razor Beam™ LP Slim Terminal Strip.
Technical Specifications
Absolute Maximum Ratings
Symbols | Min | Max | Unit | Note |
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VIN Supply Voltage | - | 24 | V |
| Storage Temperatur | -25 | +85 | °C |
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Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution.
Parameter | Min | Max | Units | Reference Document |
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VIN Supply Voltage | 24 | 24 | V |
| Operating Temperatur | -40 | +85 | °C |
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Physical Dimensions
Currently Offered Variants
Revision History
Hardware Revision History
Date | Revision | Note | Changes |
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- | 01 | Prototypes | - | - | 02 | Product Release | - U16 I2C expander: address set to 0x72
- U33 EEPROM: address set to 0x51. Added variant to set address 0x52.
- Changed power up sequence: 24V_FUSED -> 3.3V (Module power up) -> 5V -> VCCIO18, VCC_HR_B, 3.3V_SFP
- Fixed PCB patch: U6 pin 18 connected to 5V, pin 19 connected to GND.
- JTAG connector J30 VREF (pin2) and XMOD VIO (pin 6) connected to 3.3V. XMOD IO A, B, E, G connected to module MIO via level translator U8.
- Pull-up for BOOTMODE and PS_SW (DIP switch S1), RST_IN_N and USR_BTN (front panel buttons S2, S3) changed from VCCIO18 to PS_1.8V; JTAG_EN connected to 3.3V via DIP switch (S1).
- Added switch S4 for selecting of output voltage of DCDC U7 (VCC_HR_B, HR banks VCCO)
| 2018-06-18 | 02a |
| - Resistors R14 and R15 was replaced by 953R (was 5K1)
- Resistor R5 was replaced by 5K1, R8 by 953R (was 9K09 and 1K69 respectively)
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Document Change History
- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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Date | Revision | Contributor | Description |
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