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Table of Contents |
The Trenz Electronic TE0703 Carrier Board is a base-board for 4x5 SoM's, which exposes the MIO- and the PS/PL-pins of the SoM to accessible connectors and provides a whole range of on-board-components to test and evaluate Trenz Electronic 4x5 SoM's.
See page "4 x 5 cm carriers" to get information about the SoM's supported by the TE0703 Carrier Board.
Refer to http://trenz.org/te0703-info for the current online version of this manual and other available documentation. |
Board is shipped in following configuration:
Switch | Position | Description |
---|---|---|
S2-1 | ON | Mode control MC1. |
S2-2 | ON | FPGA access on module (need also S2-3 ON) |
S2-3 | ON | FPGA access on module (need also S2-2 ON) |
S2-4 | OFF | Boot mode set to QSPI. |
Different delivery configurations are available upon request.
For detailed information about the B2B pin out, please refer to the Master Pin-out Table.
Micro SD card socket is connected to the B2B connector through a Texas Instruments TXS02612 SDIO port expander for voltage translation. The Micro SD card has 3.3V signal voltage level while most 4x5 modules use 1.8V for the SD card interface.
TE0703 has on-board USB JTAG and UART solution based on UART/FIFO controller from FTDI. FTDI EEPROM is pre-programmed with license code to support Xilinx programming tools.
Do not access the FT2232H EEPROM using FTDI programming tools, doing so will erase normally invisible user EEPROM content and invalidate stored Xilinx JTAG license. Without this license the on-board JTAG will not be accessible any more with any Xilinx tools. Software tools from FTDI website do not warn or ask for confirmation before erasing user EEPROM content. |
On-board Ethernet jack J14 pins are routed to B2B connector JB1. Ethernet jack J14 LEDs PHY_LED1 and PHY_LED2 are both routed to System Controller CPLD bank 1.
TE0703 board has two physical USB sockets:
JTAG access to the System Controller CPLD and Xilinx Zynq chip on the SoM is provided via mini-USB JTAG interface (FTDI FT2232H) and controlled by DIP switch S2-3. JTAG signals from System Controller CPLD to the JB2 connector are routed as follows:
JTAG Signal | B2B Connector Pin |
---|---|
TCK | JB2-100 |
TDO | JB2-98 |
TDI | JB2-96 |
TMS | JB2-94 |
There are four on-board LEDs:
LED | Color | Description |
---|---|---|
D1 | Red | FTDI UART receive activity. |
D2 | Green | FTDI UART transmit activity. |
D3 | Red | CPLD signal FL_0. |
D4 | Green | CPLD signal FL_1. |
LEDs D3 and D4 are also connected to the B2B connector JB2 pins FLED1 and FLED2 respectively and can be controlled by SoM FPGA firmware.
DIP switch settings are CPLD Firmware depends, default firmware:
Switch | ON | OFF | Notes |
---|---|---|---|
S2-1 | Force CD Pin to module to GND | set CD Pin to module to SD CD Pin | TE0703 CPLD - CC703S#CC703S-SD |
S2-2 | Module FPGA JTAG access ( if S2-3 ON) | Module CPLD JTAG access ( if S2-3 ON) | TE0703 CPLD - CC703S#CC703S-JTAG |
S2-3 | Module FPGA/CPLD JTAG access ( depends on S2-3) | Carrier CPLD JTAG access | TE0703 CPLD - CC703S#CC703S-JTAG |
S2-4 | Boot from SD Card (set Pin to GND) | Boot from QSPI flash on module (set Pin to VDD) | TE0703 CPLD - CC703S#CC703S-BootMode |
Mode status is displayed on TE0703 LEDs, see TE0703 CPLD - CC703S#CC703S-LED.
Power supply with minimum current capability of 3A for system startup is recommended.
Single power supply with minimum current capability of 3A at 5V for system startup is recommended.
Power Input Pin | Max Current |
---|---|
VIN (power connector jack J13) | 4A |
Typical power consumption for TE0703-05 + TE0715-01 module with SD micro card inserted, Ethernet connected and link up, system booted into Linux prompt and idling is 5V / 0.55A.
It is not allowed to feed any voltage to any external I/O pin before there is no power indication on M3.3VOUT pins. Presence of 3.3V on B2B JB2 connector pins 9 and 11 indicates that module is properly powered up and ready.
If any of the VCCIOA, VCCIOB, VCCIOC or VCCIOD will be powered through external connectors J1 or J2, then corresponding VCCIO jumper should also be removed altogether, see next chapter.
Refer to the 4x5 Module Integration Guide for VCCIO voltages options.
Jumper J5 | 1-2 | 2-3 | Voltage |
---|---|---|---|
VCCIOA | ON | OFF | 1.8 V |
VCCIOA | OFF | ON | 3.3 V |
Jumper J8 | 1-2 | 2-3 | Voltage |
---|---|---|---|
VCCIOB | ON | OFF | 1.8 V |
VCCIOB | OFF | ON | 3.3 V |
Jumper J9 | 1-2 | 2-3 | Voltage |
---|---|---|---|
VCCIOC | ON | OFF | 1.8 V |
VCCIOC | OFF | ON | 3.3 V |
Jumper J10 | 1-2 | 2-3 | Voltage |
---|---|---|---|
VCCIOD | ON | OFF | 1.8 V |
VCCIOD | OFF | ON | 3.3 V |
Take care of the VCCO voltage ranges of the particular PL IO-banks (HR, HP) of the mounted SoM, otherwise damages may occur to the FPGA. Therefore, refer to the TRM of the mounted SoM to get the specific information of the voltage ranges. It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4 x 5 module to avoid failures and damages to the functionality of the mounted SoM. |
Parameter | Min | Max | Units | Reference document |
---|---|---|---|---|
5VIN supply voltage | -0.3 | 7 | V | MP5010A, EN6347QI data sheet |
Storage temperature | -40 | +100 | °C | ROHM Semiconductor SML-P11 Series datasheet |
Parameter | Min | Max | Units | Reference document |
---|---|---|---|---|
5VIN supply voltage | 4.75 | 5.25 | V | USB2.0 specification concerning 'VBUS' voltage |
Operating temperature | -40 | +85 | °C | FTDI FT2232H datasheet |
Assembly variants for higher storage temperature range are available on request. |
Please check components datasheets for complete list of absolute maximum and recommended operating ratings. |
Board size: 100 mm × 64.5 mm. Notice that the mini-USB jack on the left and ethernet RJ-45 jack on the right are hanging slightly over the edge of the PCB making the total width of the longer side approximately 106 mm. Please download the assembly diagram for exact numbers.
Mating height of the module with standard connectors: 8 mm
PCB thickness: 1.65 mm
Highest parts on the PCB are USB type A jack and ethernet RJ-45 jack, approximately 15 mm. Please download the step model for exact numbers.
All dimensions are given in millimeters.
The carrier board itself is capable to be operated at industrial grade temperature range.
Please check the operating temperature range of the mounted modules which determines the relevant operating temperature range of the overall system.
42g - Plain board.
13g - 2 x VG96 connectors.
Date | Revision | Notes | PCN | Documents |
---|---|---|---|---|
2016-09-07 | 05 | Added VCCIO Jumpers | TE0703 | |
- | 04 | Corrected FTDI EEPROM connection | - | TE0703-04 |
- | 03 | Added VCCIO strapping resistors | - | |
- | 02 | First series boards | - | |
- | 01 | Prototypes | - |
Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Date | Revision | Contributors | Description |
---|---|---|---|
Ali Naseri |
| ||
2017-02-07 | v.28 | John Hartfiel |
|
2017-11-09 | v.26 | John Hartfiel |
|
2017-02-21 | v.19 | Jan Kumann |
|
2017-02-02 | v.16 | Jan Kumann |
|
2016-12-22 | v.14 | Jan Kumann |
|
2016-12-08 | v.10 | Jan Kumann |
|
2016-12-05 | v.5 | John Hartfiel |
|
2016-09-06 | v.1 | Jan Kumann, John Hartfiel |
|