<!-- tables have all same width (web max 1200px and pdf full page(640px), flexible width or fix width on menu for single column can be used as before) -->
<style>
.wrapped{
  width: 100% !important;
  max-width: 1200px !important;
 }
</style>

Overview

The Trenz Electronic TE0022-01 board is a SoC module based on Intel Cyclone V FPGA, an ethernet PHY, one GByte DDR3 SDRAM and one 32 MByte Quad SPI Flash memory for configuration and operation per HPS and FPGA, and powerful switching-mode power supplies for all on-board voltages.

Refer to http://trenz.org/tei0022-info for the current online version of this manual and other available documentation.

Key Features

• SoC FPGA
  
  • Intel Cyclone V (5CSEMA5F31C8N)
  • Package: FBGA 896 pins
  • Speed Grade: 8
  • Temperature: Commercial (Tj = 0 °C to 85 °C)
• RAM/Storage
  • 1 GByte DDR3 SDRAM for HPS
  • 1 GByte DDR3 SDRAM for FPGA
  • 32 MByte SPI for HPS
  • 32 MByte SPI for FPGA
• On Board
  
  • up to 7 x SMA Connector
  • Temperature Sensor
  • Intel MAX10 for board management
• Interface
  • LPC FMC Connector
  • 4 x PMOD Connector
  • JTAG via micro USB B Connector
  • UART via micro USB B Connector
  • 4 x USB 2.0
  • Ethernet via RJ45 Connector
  • SD Card
  • HDMI
• Power
  • 12 V Input supply voltage
• Dimension
  • 160 mm x 130 mm

Block Diagram

Main Components

1. Intel Cyclone V, U10
2. DDR3 SDRAM, U26...27
3. DDR3 SDRAM, U28...29
4. FMC, J4
5. PMOD, P1...4
6. SD Card Connector, J3
7. Ethernet PHY, U1
8. RJ45 Connector, J1
9. USB ULPI, U8
10. USB HUB, U33
11. USB Connector, J2, J12
12. HDMI Transmitter, U23
13. HDMI Connector, J11
14. Intel MAX10, U41
15. Micro USB to UART Interface, J5, U30
16. USB to JTAG, U21
17. Micro USB JTAG, J13
18. SMA Connector
19. Push Button, S1, S3...5
20. LED
21. 4-Bit DIP Switch, S2, S7...8
22. 12 V Power Jack, J6
23. Clock Generator, U48
24. Programmable Clock Generator, U3
25. QSPI - FPGA PS, U6
26. QSPI - FPGA PL, U15
27. Temperature Sensor, U16
28. EEPROM, U38

Initial Delivery State

Configuration Signals

Signals, Interfaces and Pins

FMC LPC Connector

The FMC (FPGA Mezzanine Card) connector J4 with low pin count (LPC) provides as an ANSI/VITA 57.1 standard a modular interface to the Intel Cyclone V FPGA and exposes numerous of its I/O pins for use by other mezzanine modules and expansion cards.

The connector supports single ended (VCCIO: FMC_VADJ) and differential signaling as the I/O's are routed from the FPGA banks as LVDS-pairs to the FMC connector.

The FMC connector provides further interfaces like JTAG and I²C interfaces:

Several VCCIO voltages are available on the FMC connector to operate the I/O's on different voltage levels:

Pmod Connector

The TEI0022 board offers four Pmod (2x6 pins, SMD) connectors which provides as a standard modular interface single ended I/O pins for use with extension modules.

Following table gives an overview of the Pmod connectors and the signals routed to the attached Intel Cyclone V (U10):

SMA Connector

The TEI0022 board offers up to seven SMA connectors for trigger and clock input and output.

FAN Connector

The TEI0022 board offers one FAN connector for cooling the FPGA device. Depending on the assembly 5 V or 12 V are usable.

Micro USB Connector (JTAG)

According to the JTAGEN and JTAGSEL[1..0] pins the management Intel MAX10 (U41), the Intel Cyclone V HPS (U10), the Intel Cyclone V FPGA (U10) or the FMC (J4) can be accessed via the micro USB B connector J13.

Micro USB Connector (UART)

A UART connection between the USB B connector J5 and the Intel Cyclone HPS U10 is possible via the FT234XD (U30) chip.

USB Connector

On the TEI0022 board there are up to four USB 2.0 Hi-Speed ports available (J2, J12).

HDMI Connector

The TEI0022 provides an HDMI Connector.

SD Card Connector

SD Card connector J3 is connected to the Intel Cyclone V.

RJ45 Connector

The board TEI0022 provides an ethernet interface via the RJ45 connector J1.

I2C

The TEI0022 provides three independent I2C busses. One bus is used to connect the FMC I2C with the Intel Cyclone V HPS. The second bus is to connect the HDMI device to the Intel Cyclone V FPGA. The third bus is used to handle the other on-board I2C devices.

On-board Peripherals

System Controller Intel MAX10

The TEI0022 is equipped with an Intel MAX10 (U41) which is the central system management unit where essential control signals are logically linked by the implemented logic of the FPGA firmware. This generates output signals to control the system, the on-board peripherals and the interfaces. Interfaces like JTAG and buttons between the on-board peripherals and to the FPGA-module are by-passed, forwarded and controlled by the System Controller. Other tasks of the System Controller are the monitoring of the power-on sequence and configuration of the Intel Cyclone V FPGA. The functionalities and configuration of the pins depend on its firmware.

Intel Cyclone V

The on TEI0022 board used Intel Cyclone V device is a SoC with integrated ARM-based HPS. The 5CSEMA5F31C8N version delivers one hard memory controller, 80K logic elements in an FineLineBGA (FBGA) with 896 pins for the commercial temperature range of TJ = 0...85 °C with speed grade eight.

DDR3 SDRAM

The TEI0022 SoM has one GByte volatile DDR3 SDRAM memory per FPGA (U26, U27) and HPS (U28, U29) for storing user application code and data.

• Part number: IS43TR16512BL-125KBLI
• Supply voltage: 1.5 V
• Speed: TBD
• Temperature: TC = -40 °C up to 95 °C

Gigabit Ethernet PHY

On-board Gigabit Ethernet PHY (U1) is provided with Analog Devices ADIN1300. The Ethernet PHY RGMII interface is connected to the Intel Cyclone V HPS. I/O voltage is fixed at 3.3 V. The reference clock input of the PHY is supplied from the on-board 25.0 MHz oscillator (U48).

High-Speed USB ULPI PHY

USB PHY (U8) is provided by USB3320C from Microchip. The ULPI interface is connected to the Intel Cyclone V HPS. I/O voltage is fixed at 3.3 V and PHY reference clock input is supplied from the on-board 24.0 MHz oscillator (U34).

4-Port USB 2.0 Hub

On the TEI0022 board there are up to four USB 2.0 Hi-Speed ports available (J2, J12). The USB 2.0 ports are provided by Microchip Cypress USB2514B 4-port USB 2.0 Hub controller (U33) which is connected to the USB PHY USB3320C (U8) connected to the Intel Cyclone V HPS via ULPI.

HDMI Transmitter

The TEI0022 board provides an HDMI interface routed to the Intel Cyclone FPGA (U10). The HDMI interface is created by the HDMI transmitter ADV7511 provided by Analog Devices. The HDMI transmitter is incorporated in conjunction with the HDMI protection circuit TI TPD12S016 for more signal robustness.

FTDI (JTAG)

Please refer to the section "Micro USB Connector (JTAG)".

FTDI (UART)

Please refer to the section "Micro USB Connector (UART)".

DIP-Switches

There are three 4-bit DIP-switches present on the TEI0022 board to configure options and set parameters. The following section describes the functionalities of the particular switches.

DIP-Switch S2

The table below describes the functionalities of the switches of DIP-switch S2 at their single positions:

DIP-Switch S7

The table below describes the functionalities of the switches of DIP-switch S7 at their single positions:

DIP-Switch S8

The table below describes the functionalities of the switches of DIP-switch S8 at their single positions:

Buttons

There are four buttons present on the TEI0022 board. The following section describes the functionalities of the particular buttons. The final functionality is set by the management Intel MAX10.

On-Board LEDs

The TEI0022 board is equipped with several LEDs to signal current states and activities. The functionality of the LEDs D11...14 are user LEDs. The LED D8 shows the Intel Cyclone V configuration progress. LEDs D15, D18...19 shows the UART connection and the other LEDs mentioned in the table are supply power status LEDs.

Temperatur Sensor

The temperature sensor ADT7410 (U16) is implemented on the TEI0022 board.

Quad SPI Flash Memory

Two 256 Mbit (32 MByte) Quad SPI Flash Memory (Micron MT25QL256ABA8E12, U6, U15) are provided for FPGA and HPS configuration file storage. After configuration process completes the remaining free memory can be used for application data storage. All four SPI data lines are connected to the FPGA or the HPS allowing x1, x2 or x4 data bus widths to be used. The maximum data transfer rate depends on the bus width and clock frequency.

Quad SPI Flash memory U6 is connected to the HPS bank 7B and U15 to FPGA bank 3A.

EEPROM

The TEI0022 board contains two EEPROMs for configuration and general user purposes.

Clock Sources

The FPGA module has following reference clocking source provided by an on-board oscillator:

Programmable Clock Generator

There is a Silicon Labs I²C programmable quad PLL clock generator on-board (Si5338A, U3) to generate various reference clocks for the module.

Power Monitoring

The TEI0022 uses a precision supply monitor (U54) for three voltages. Therefore if one of the voltages browns out it should be realized and handled.

Power and Power-On Sequence

Power Supply

The maximum power consumption of this board mainly depends on the design which is running on the FPGA. Intel provides a power estimator excel sheets to calculate power consumption.

Power Consumption

* TBD - To Be Determined

Power Distribution Dependencies

All on-board voltages of the TEI0022 are generated out of the extern applied 12 V power supply.

There are following dependencies how the initial 12V power supply is distributed to the on-board DC-DC converters, which power up further DCDC converters and the particular on-board voltages:

Power-On Sequence

The following figures delivers the power-on sequence information. The figure Power Sequency shows the connections between the power devices and its management. The figure Suggested Power Sequency shows the recommended firmware power-on sequence.

Voltage Monitor Circuit

The voltages +3.3V, +5.0V, and VCC are monitored by the voltage monitor circuit LTC2911 (U54), which generates a reset signal at power-on. A manual reset is also possible as described in the reset table.

Bank Voltages

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Physical Dimensions

• Module size: 160 mm × 130 mm.  Please download the assembly diagram for exact numbers.

PCB thickness: 1.9 mm.

Currently Offered Variants 

Revision History

Hardware Revision History

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

Disclaimer