- Created by Thomas Dück, last modified on 07 02, 2022
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Overview
Refer to http://trenz.org/tei0022-info for the current online version of this manual and other available documentation.
Key Features
- Quartus 20.1.1 Lite
- Yocto
- SD
- UART
- ETH
- USB
- I2C
- HDMI
- DDR3 memory
- User LED
Revision History
Date | Quartus | Project Built | Authors | Description |
---|---|---|---|---|
2022-02-03 | 20.1.1 Lite | TEI0022-test_board_noprebuilt-quartus_20.1.1-20220203152427.zip TEI0022-test_board-quartus_20.1.1-20220203153430.zip | Thomas Dück |
|
Release Notes and Know Issues
Issues | Description | Workaround | To be fixed version |
---|---|---|---|
No known issues | --- | --- | --- |
Requirements
Software
Software | Version | Note |
---|---|---|
Quartus Prime Lite | 20.1.1 | needed |
Intel SoC FPGA EDS Standard Edition | 20.1 | needed |
Yocto | dunfell | optional (more information: Yocto KICKstart#Used source files) |
Hardware
Complete List is available on <project folder>/board_files/*_board_files.csv
Design supports following modules:
Module Model | Board Part Short Name | Yocto Machine Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
---|---|---|---|---|---|---|---|---|
TEI0022-03* | A5_C8_2GB | tei0022-a5-c8-2gb | REV03 | 1GB | 32MB | -- | -- | -- |
*used as reference
Design supports following carriers:
Carrier Model | Notes |
---|---|
--- |
*used as reference
Additional HW Requirements:
Additional Hardware | Notes |
---|---|
USB cable for JTAG/UART | Check Carrier Board and Programmer for correct type |
Monitor | tested with DELL U2412M |
Keyboard | -- |
Mouse | -- |
HDMI cable | -- |
*used as reference
Content
For general structure and usage of the reference design, see Project Delivery - Intel devices
Design Sources
Type | Location | Notes |
---|---|---|
Quartus | <project folder>/source_files/quartus <project folder>/source_files/<Board Part Short Name>/quartus | Quartus project will be generated by TE Scripts optional, source files for specific assembly variants |
Software | <project folder>/source_files/software <project folder>/source_files/<Board Part Short Name>/software | Additional software will be generated by TE Scripts optional, source files for specific assembly variants |
Yocto | <project folder>/source_files/os/yocto | Yocto BSP layer template for linux |
Prebuilt
File | File-Extension | Description |
---|---|---|
SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware |
SRAM Object File | *.sof | Ram configuration file |
Raw binary file | *.rbf | FPGA configuration file |
Diverse Reports | --- | Report files in different formats |
Yocto linux image | *.wic | Linux image for SD card |
Download
Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.
Reference Design is available on:
Design Flow
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.
Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win OS and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh:
'Create Project' GUI example
- Select Board in "Board selection"
- Click on "Create project" button to create project
- (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"
- Create and configure your Yocto Linux project, see Yocto KICKstart
- Copy the generated meta-<module> folder from <project name>/os/yocto/meta-<module> to the path/to/yocto/poky/ directory
- Follow the steps from Yocto KICKstart#Create a project for an Intel FPGA device without running the 'bitbake' command
Add the generated bsp layer meta-<machine> to path/to/yocto/poky/build/conf/bblayers.conf with:
bitbake-layers add-layer ../meta-tei0022
Note: The generated meta-tei0022 layer depends on the meta-altera layer (for more information see: Yocto KICKstart#Used source files), so you need to add both bsp layers to bblayers.conf
Redefine the variable MACHINE with 'tei0022-<Board-Part-Short-Name>' in path/to//yocto/poky/build/conf/local.conf. The correct MACHINE name can be found in the #Hardware table.
sed -i '/^MACHINE/s/MACHINE/#MACHINE/g' conf/local.conf echo -e '\nMACHINE = "tei0022-<Board-Part-Short-Name>"' >> conf/local.conf
Build the image with following command (the image recipes are located in meta-<module>/recipes-images/yocto/):
bitbake tei0022-image-minimal
- [optional} Create a debian or ubuntu rootfs with/without desktop environment for this board. For more information and instructions see: Create debian/ubuntu rootfs - Intel devices
Launch
Programming
Check Module and Carrier TRMs for proper HW configuration before you try any design.
SD-Boot mode
- Follow the steps described in Yocto KICKstart#Copy image to SD card to copy the generated linux image to the SD card.
- Set Boot Mode to SD-Boot.
- see module TRM for correct settings
- Insert SD-Card in SD-Slot.
QSPI
Not used on this example.
JTAG
Not used on this example.
Usage
- Prepare HW like described on section Programming
- Connect UART USB (most cases same as JTAG)
- Power on PCB
UART
- Open Serial Console (e.g. PuTTY)
select COM Port
Win OS: see device manager
Linux OS: see dmesg | grep tty (UART is *USB1)
- Speed: 115200
- Press reset button
- Linux Console:
Login data:
Note: Wait until Linux boot finished
Username: root Password: root
You can use Linux shell now.
i2cdetect -y -r 1 (check I2C 1 Bus) udhcpc (ETH0 check) lsusb (USB check)
Monitor
- Connect the Monitor to HDMI
- Connect the Mouse+Keyboard to USB
- Press reset button
- If yocto default rootfs is used, the linux console is displayed:
Login data:
Note: Wait until Linux boot finished
Username: root Password: root
You can use Linux shell now.
i2cdetect -y -r 1 (check I2C 1 Bus) udhcpc (ETH0 check) lsusb (USB check)
- [optional] Ubuntu/Debian desktop will be started automatically (see #Rootfs)
System Design - Quartus
Block Design
The block designs may differ depending on the assembly variant.
![](/download/attachments/139238626/TEI0022-test_board-bd.jpg?version=2&modificationDate=1655298630660&api=v2)
HPS Interfaces
Activated interfaces:
Type | Note |
DDR | -- |
EMAC1 | -- |
QSPI | -- |
SDMMC | -- |
USB1 | -- |
UART0 | -- |
I2C0 | -- |
I2C1 | -- |
GPIO35 | connected to ETH PHY_INT pin |
GPIO42 | connected to USB_RST pin |
GPIO43 | connected to ETH_RST pin |
GPIO48 | connected to CPU_GPIO_0 pin |
GPIO53 | connected to LED_HPS_1 pin |
GPIO54 | connected to LED_HPS_2 pin |
GPIO55 | connected to CPU_GPIO_3 pin |
GPIO56 | connected to CPU_GPIO_2 pin |
GPIO57 | connected to USER_BTN_HPS pin |
GPIO58 | connected to CPU_GPIO_1 pin |
GPIO61 | connected to CPU_GPIO_4 pin |
Software Design - Yocto
For Yocto installation and project creation, follow instructions from:
U-Boot
Start with Create a custom BSP layer for Intel SoC or FPGA#Configure u-boot
File location: meta-tei0022/recipes-bsp/u-boot/
Changes:
select tei0022 board
# CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK is not set
CONFIG_TARGET_TEI0022=y
configure bootcommand (load soc_system.rbf file into the FPGA
CONFIG_BOOTCOMMAND="load mmc 0:1 $loadaddr soc_system.rbf; fpga load 0 $loadaddr $filesize; bridge enable; run distro_bootcmd"
- enable misc_init_r function (need to call TE_read_eeprom_mac function)
CONFIG_MISC_INIT_R=y
CONFIG_MISC=y
MAC from eeprom together with uboot:
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_I2C_EEPROM_BUS=1
CONFIG_SYS_EEPROM_SIZE=256
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=0
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=1
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0
configure eth
- CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_RGMII=y
# CONFIG_MII is not set
- select device tree
- CONFIG_DEFAULT_DEVICE_TREE="tei0022_<Board Part Short Name>"
- CONFIG_DEFAULT_FDT_FILE="tei0022_<Board Part Short Name>.dtb"
Device Tree
#include "socfpga_cyclone5.dtsi" #include "dt-bindings/interrupt-controller/irq.h" #include <dt-bindings/gpio/gpio.h> / { chosen { bootargs = "earlyprintk"; stdout-path = "serial0:115200n8"; }; axi_dma_clk: axi_dma_clk { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <100000000>; clock-output-names = "axi_dma_clock"; }; sys_clk: sys_clk { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <80000000>; clock-output-names = "sys_clock"; }; hdmi_pll: hdmi_pll { compatible = "altr,altera_iopll-18.1"; #clock-cells = <1>; hdmi_pll_outclk0: hdmi_pll_outclk0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <148500000>; clock-output-names = "hdmi_pll-outclk0"; }; }; vdd: regulator-vdd { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; vdd_3_3: regulator-vdd { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vref: regulator-vref { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; soc { i2c1: i2c@ffc05000 { status = "okay"; speed-mode = <0>; #address-cells = <1>; #size-cells = <0>; adv7511: adv7511@39 { compatible = "adi,adv7511"; reg = <0x39>, <0x3f>; reg-names = "primary", "edid"; adi,input-depth = <8>; adi,input-colorspace = "yuv422"; adi,input-clock = "1x"; adi,input-style = <1>; adi,input-justification = "right"; adi,clock-delay = <(0)>; avdd-supply = <&vdd>; dvdd-supply = <&vdd>; pvdd-supply = <&vdd>; dvdd-3v-supply = <&vdd_3_3>; bgvdd-supply = <&vdd>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; adv7511_in: endpoint { remote-endpoint = <&axi_hdmi_out>; }; }; port@1 { reg = <1>; }; }; }; }; sys_hps_bridges: bridge@ff200000 { compatible = "simple-bus"; reg = <0xff200000 0x00200000>; reg-names = "axi_h2f_lw"; #address-cells = <2>; #size-cells = <1>; ranges = <0x00000001 0x00001000 0xff201000 0x00000010>, <0x00000001 0x00001010 0xff201010 0x00000010>, <0x00000001 0x00001020 0xff201020 0x00000008>, <0x00000001 0x00001030 0xff201030 0x00000008>, <0x00000001 0x00010000 0xff210000 0x00000800>, <0x00000001 0x00020000 0xff220000 0x00010000>; jtag_uart: jtag-uart@100001030 { compatible = "altr,juart-1.0"; reg = <0x00000001 0x000001030 0x00000008>; interrupts = <0 40 4>; }; sysid: sysid@100001020 { compatible = "altr,sysid-1.0"; reg = <0x00000001 0x00001020 0x00000008>; }; fpga_sw: fpga-sw@100001000 { compatible = "altr,pio-1.0"; reg = <0x00000001 0x00001000 0x00000010>; interrupts = <0 41 1>; altr,gpio-bank-width = <2>; #gpio-cells = <2>; gpio-controller; interrupt-cells = <1>; interrupt-controller; altr,interrupt-type = <IRQ_TYPE_EDGE_BOTH>; }; fpga_led: fpga-led@100001010 { compatible = "altr,pio-1.0"; reg = <0x00000001 0x00001010 0x00000010>; altr,gpio-bank-width = <2>; #gpio-cells = <2>; gpio-controller; }; leds { compatible = "gpio-leds"; fpgaled0 { label = "fpga_led0"; gpios = <&fpga_led 0 1>; }; fpgaled1 { label = "fpga_led1"; gpios = <&fpga_led 1 1>; }; }; hdmi_axi_dmac: axi-dmac@100010000 { compatible = "adi,axi-dmac-1.00.a"; reg = <0x00000001 0x00010000 0x00000800>; #dma-cells = <1>; interrupt-parent = <&intc>; interrupts = <0 42 4>; clocks = <&axi_dma_clk 0>; status = "okay"; adi,channels { #size-cells = <0>; #address-cells = <1>; dma-channel@0 { reg = <0>; adi,source-bus-width = <64>; adi,source-bus-type = <0>; adi,destination-bus-width = <64>; adi,destination-bus-type = <1>; }; }; }; hdmi_axi_tx: axi-hdmi-tx@100020000 { compatible = "adi,axi-hdmi-tx-1.00.a"; reg = <0x00000001 0x00020000 0x10000>; dmas = <&hdmi_axi_dmac 0>; dma-names = "video"; clocks = <&hdmi_pll_outclk0 0>; status = "okay"; port { axi_hdmi_out: endpoint { remote-endpoint = <&adv7511_in>; }; }; }; }; }; }; &gmac1 { #address-cells = <1>; #size-cells = <0>; status = "okay"; phy-mode = "rgmii"; ethernet-phy@1 { reg = <1>; adi,rx-internal-delay-ps = <2000>; adi,tx-internal-delay-ps = <2000>; }; }; &i2c1 { status = "okay"; clock-frequency = <100000>; eeprom: eeprom@50 { compatible = "atmel,24c08"; reg = <0x50>; }; };
#include "socfpga_cyclone5.dtsi" #include "dt-bindings/interrupt-controller/irq.h" #include <dt-bindings/gpio/gpio.h> / { chosen { bootargs = "earlyprintk"; stdout-path = "serial0:115200n8"; }; axi_dma_clk: axi_dma_clk { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <100000000>; clock-output-names = "axi_dma_clock"; }; sys_clk: sys_clk { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <80000000>; clock-output-names = "sys_clock"; }; hdmi_pll: hdmi_pll { compatible = "altr,altera_iopll-18.1"; #clock-cells = <1>; hdmi_pll_outclk0: hdmi_pll_outclk0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <148500000>; clock-output-names = "hdmi_pll-outclk0"; }; }; vdd: regulator-vdd { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; vdd_3_3: regulator-vdd { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vref: regulator-vref { compatible = "regulator-fixed"; regulator-name = "fixed-supply"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; soc { i2c1: i2c@ffc05000 { status = "okay"; speed-mode = <0>; #address-cells = <1>; #size-cells = <0>; adv7511: adv7511@39 { compatible = "adi,adv7511"; reg = <0x39>, <0x3f>; reg-names = "primary", "edid"; adi,input-depth = <8>; adi,input-colorspace = "yuv422"; adi,input-clock = "1x"; adi,input-style = <1>; adi,input-justification = "right"; adi,clock-delay = <(0)>; avdd-supply = <&vdd>; dvdd-supply = <&vdd>; pvdd-supply = <&vdd>; dvdd-3v-supply = <&vdd_3_3>; bgvdd-supply = <&vdd>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; adv7511_in: endpoint { remote-endpoint = <&axi_hdmi_out>; }; }; port@1 { reg = <1>; }; }; }; }; sys_hps_bridges: bridge@ff200000 { compatible = "simple-bus"; reg = <0xff200000 0x00200000>; reg-names = "axi_h2f_lw"; #address-cells = <2>; #size-cells = <1>; ranges = <0x00000001 0x00001000 0xff201000 0x00000010>, <0x00000001 0x00001010 0xff201010 0x00000010>, <0x00000001 0x00001020 0xff201020 0x00000008>, <0x00000001 0x00001030 0xff201030 0x00000008>, <0x00000001 0x00010000 0xff210000 0x00000800>, <0x00000001 0x00020000 0xff220000 0x00010000>; fpga_sw: fpga-sw@100001000 { compatible = "altr,pio-1.0"; reg = <0x00000001 0x00001000 0x00000010>; interrupts = <0 41 1>; altr,gpio-bank-width = <2>; #gpio-cells = <2>; gpio-controller; interrupt-cells = <1>; interrupt-controller; altr,interrupt-type = <IRQ_TYPE_EDGE_BOTH>; }; fpga_led: fpga-led@100001010 { compatible = "altr,pio-1.0"; reg = <0x00000001 0x00001010 0x00000010>; altr,gpio-bank-width = <2>; #gpio-cells = <2>; gpio-controller; }; leds { compatible = "gpio-leds"; fpgaled0 { label = "fpga_led0"; gpios = <&fpga_led 0 1>; }; fpgaled1 { label = "fpga_led1"; gpios = <&fpga_led 1 1>; }; }; sysid: sysid@100001020 { compatible = "altr,sysid-1.0"; reg = <0x00000001 0x00001020 0x00000008>; }; jtag_uart: jtag-uart@100001030 { compatible = "altr,juart-1.0"; reg = <0x00000001 0x000001030 0x00000008>; interrupts = <0 40 4>; }; hdmi_axi_dmac: axi-dmac@100010000 { compatible = "adi,axi-dmac-1.00.a"; reg = <0x00000001 0x00010000 0x00000800>; #dma-cells = <1>; interrupt-parent = <&intc>; interrupts = <0 42 4>; clocks = <&axi_dma_clk 0>; status = "okay"; adi,channels { #size-cells = <0>; #address-cells = <1>; dma-channel@0 { reg = <0>; adi,source-bus-width = <64>; adi,source-bus-type = <0>; adi,destination-bus-width = <64>; adi,destination-bus-type = <1>; }; }; }; hdmi_axi_tx: axi-hdmi-tx@100020000 { compatible = "adi,axi-hdmi-tx-1.00.a"; reg = <0x00000001 0x00020000 0x10000>; dmas = <&hdmi_axi_dmac 0>; dma-names = "video"; clocks = <&hdmi_pll_outclk0 0>; status = "okay"; port { axi_hdmi_out: endpoint { remote-endpoint = <&adv7511_in>; }; }; }; }; }; }; &gmac1 { #address-cells = <1>; #size-cells = <0>; status = "okay"; phy-mode = "rgmii-id"; ethernet-phy@1 { reg = <1>; adi,rx-internal-delay-ps = <2000>; adi,tx-internal-delay-ps = <2000>; }; };
Kernel
Start with Create a custom BSP layer for Intel SoC or FPGA#Configure linux kernel
File location: meta-<module>/recipes-kernel/linux/
Changes:
- for hdmi output
CONFIG_AXI_DMAC=y
CONFIG_CMA=y
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=128
CONFIG_DRM=y
CONFIG_DRM_BRIDGE=y
CONFIG_DRM_I2C_ADV7511=y
CONFIG_DRM_ADI_AXI_HDMI=y
set TE boot logo
CONFIG_LOGO=y
CONFIG_LOGO_TRENZELECTRONICS_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
config ethernet phy
CONFIG_PHYLIB=y
CONFIG_ADIN_PHY=y
set debug settings
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_SOCFPGA_UART0=y
CONFIG_EARLY_PRINTK=y
Images
Image recipe for minimal console image
File location: meta-<module>/recipes-images/yocto/
Added packages/recipes:
tei0022-rbf
ethtool
i2c-tools
net-tools
usbutils
Rootfs
Optionally it's possible to create a debian or ubuntu rootfs with/without desktop environment for this board. For more information and instructions see: Create debian/ubuntu rootfs - Intel devices
Appx. A: Change History and Legal Notices
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
Date | Document Revision | Authors | Description |
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Legal Notices
Data Privacy
Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy
Document Warranty
The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.
Limitation of Liability
In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.
Copyright Notice
No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.
Technology Licenses
The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.
Environmental Protection
To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.
REACH, RoHS and WEEE
REACH
Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).
RoHS
Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.
WEEE
Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).
Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.
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Error rendering macro 'page-info'
Ambiguous method overloading for method jdk.proxy244.$Proxy3575#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]
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