JTAG Access Vivado
Start Vivado or Vivado Labtools, and choose Hardware Manager.
Vivado Labtools screen PCB Revision 2, DDR Voltage is measured 1.35V for DDR3L, Digilent is displayed in JTAG Cable properties.
If Linux has been booted it may happen that XADC monitor readback is disabled, in that case all the temperature and voltage readings would be invalid.
JTAG Access SDK
Console/XMD
Launch Xilinx SDK prompt, then start XMD and connect to ARM DAP
Simplest way to check ARM JTAG Debug connection, in the screenshot memory content from address 0 is dumped in hex.
Console/XSDB
Launch Xilinx SDK prompt, then use xsdb commands
Reading 10 words from memory location 0
Overview
Content Tools