Refer to http://trenz.org/tei1000-info for the current online version of this manual and other available documentation.
| Date | Quartus | Project Built | Authors | Description |
|---|---|---|---|---|
| 2025-04-25 | 23.4 Pro | TEI1000-rd-test_board-quartus_23.4.0-20250425161615.zip TEI1000-rd-test_board_noprebuilt-quartus_23.4.0-20250425161615.zip | Thomas Dück |
|
| Issues | Description | Workaround | To be fixed version |
|---|---|---|---|
| No known issues | --- | --- | --- |
| Software | Version | Note |
|---|---|---|
| Quartus Prime Pro | 23.4 | Nios V license is needed. For more information see: Intel Nios V Processors |
| Ashling RiscFree IDE for Intel FPGAs | 23.4 | needed |
| Yocto | scarthgap | optional |
Complete List is available on <project folder>/board_files/*_board_files.csv
Design supports following modules:
| Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
|---|---|---|---|---|---|---|
| TEI1000-02-A3I11-A* | A3I11 | REV02 | 1GB | 64MB | -- | -- |
| TEI1000-02-ADI11-A | ADI11 | REV02 | 1GB | 64MB | -- | -- |
*used as reference
Design supports following carriers:
| Carrier Model | Notes |
|---|---|
| TEB1000-02* | Used as reference carrier |
*used as reference
Additional HW Requirements:
| Additional Hardware | Notes |
|---|---|
| USB cable for JTAG/UART | Check Carrier Board and Programmer for correct type |
| TEI0004 JTAG Programmer | |
| USB Stick | Optional HW USB was tested with USB memory stick |
| ETH cable | Optional HW Ethernet works with DHCP, but can be setup also manually |
| SD card | with fat32 partition |
*used as reference
For general structure and usage of the reference design, see Project Delivery - Intel devices
| Type | Location | Notes |
|---|---|---|
| Quartus | <project folder>/source_files/<Board Part Short Name>/quartus/ | Quartus project will be generated by TE Scripts |
| Software | <project folder>/source_files/<Board Part Short Name>/software/ | Additional software will be generated by TE Scripts |
| Yocto | <project folder>/source_files/<Board Part Short Name>/os/yocto/ | Yocto BSP layer template for linux |
File | File-Extension | Description |
|---|---|---|
| SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware |
| SRAM Object File | *.sof | Ram configuration file |
| JTAG indirect configuration file | *.jic | Flash configuration file |
| Diverse Reports | --- | Report files in different formats |
| Device Tree | *.dts | Device tree (2 possible, one for u-boot and one for linux) |
| SFP-File | *.sfp | Boot image with SPL (Secondary Program Loader) |
| Software-Application-File | *.elf | Software application for Nios II/Nios V processor system |
Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.
Reference Design is available on:
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win OS and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

. ./meta-trenz_altera/tei1000_yocto_setup
(SX Variant only) Open Nios V command shell and run following command to generate the jic file with this files included:
test_board.sof file (generated in quartus project)
u-boot-dtb.hex file (generated with Yocto):
quartus_pfg -c path/to/reference_design/quartus/output_files/test_board.sof path/to/reference_design/quartus/output_files/u-boot-spl-dtb.jic \ -o device=MT25QU512 \ -o flash_loader=1SX040HH3 \ -o hps_path=path/to/yocto/u-boot-spl-dtb.hex \ -o mode=ASX4
Check Module and Carrier TRMs for proper HW configuration before you try any design.
Reference Design is also available with prebuilt files. It's recommended to use TE prebuilt files for first launch.
Not used on this example.
select COM Port
Win OS: see device manager | Linux OS: see ls -l dev/serial/by-id (UART is *USB1)
Note: Wait until Linux boot finished
You can use Linux shell now.
i2cdetect -y -r 1 (check I2C 1 Bus) udhcpc (ETH check) lsusb (USB check)
Optional Features
The block designs may differ depending on the assembly variant.


Activated interfaces:
| Type | Note |
| DDR | -- |
| EMAC1 | -- |
| GPIO0 | -- |
| I2C1 | -- |
| SDMMC | -- |
| UART0 | -- |
| USB1 | -- |
Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/
Hello TEI1000 is a Hello World example as endless loop instead of one console output.
File location: meta-trenz_altera/recipes-bsp/u-boot/
Changes:
enable boot from sd
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="setenv fdt_addr_r 0x10000000; run distro_bootcmd"
set env to nowhere
CONFIG_ENV_IS_NOWHERE=y
# CONFIG_ENV_IS_IN_FAT is not set
MAC from eeprom
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_I2C_EEPROM_BUS=1
CONFIG_SYS_EEPROM_SIZE=256
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=0
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=1
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0
enable spl output
CONFIG_SPL_DISPLAY_PRINT=y
enable misc_init_r function
CONFIG_MISC_INIT_R=y
configure eth
CONFIG_PHY_MARVELL=y
# CONFIG_DM_ETH_PHY is not set
Disable NAND/UBI/QSPI related settings from defconfig
CONFIG_NAND_BOOT=n
CONFIG_SPL_NAND_SUPPORT=n
CONFIG_CMD_NAND_TRIMFFS=n
CONFIG_CMD_NAND_LOCK_UNLOCK=n
CONFIG_NAND_DENALI_DT=n
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=n
CONFIG_UBIFS_SILENCE_MSG=n
CONFIG_QSPI_BOOT=n
CONFIG_SPL_NAND_FRAMEWORK=n
CONFIG_MTD_RAW_NAND=n
CONFIG_CMD_UBI=n
CONFIG_CMD_UBIFS=n
CONFIG_MTD_UBI=n
CONFIG_ENV_IS_IN_UBI=n
#u-boot device_tree.dts
/ {
aliases {
serial0 = &uart0;
ethernet1 = &gmac1;
i2c1 = &i2c1;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&emac1_phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
emac1_phy0: ethernet-phy@1 {
reg = <1>;
};
};
};
&gpio0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom_mac: eeprom@50 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x50>;
compatible = "microchip,24aa025","atmel,24c02";
};
};
&mmc {
status = "okay";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
};
&uart0 {
status = "okay";
clock-frequency = <75000000>;
};
&usb1 {
status = "okay";
};
&watchdog0 {
status = "okay";
};
#device_tree-u-boot.dts
/ {
chosen {
stdout-path = "serial0:115200n8";
u-boot,spl-boot-order = &mmc;
};
};
&clkmgr {
bootph-all;
};
&sysmgr {
bootph-all;
};
&fdt_0_blob {
filename = "arch/arm/dts/tei1000_a3i11.dtb";
};
&binman {
/delete-node/ kernel;
};
#kernel device_tree.dts
/ {
aliases {
serial0 = &uart0;
ethernet1 = &gmac1;
i2c1 = &i2c1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x00000000 0 0x40000000>;
};
soc {
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc", "altr,socfpga-sdmmc-ecc";
reg = <0xff8c8c00 0x100>;
altr,ecc-parent = <&mmc>;
interrupts = <14 4>, <15 4>;
};
};
mmcclk_ciu: mmcclk-ciu {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&emac1_phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
emac1_phy0: ethernet-phy@1 {
reg = <1>;
};
};
};
&gpio0 {
status = "okay";
};
&i2c1 {
status = "okay";
eeprom: eeprom@50 {
compatible = "microchip,24aa025","atmel,24c02";
reg = <0x50>;
eth1_addr: eth-mac-addr@fa {
reg = <0xfa 0x06>;
};
};
};
&mmc {
status = "okay";
cd-gpios = <&porta 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
clocks = <&clkmgr STRATIX10_L4_MP_CLK>, <&mmcclk_ciu>;
};
&osc1 {
clock-frequency = <25000000>;
};
&uart0 {
status = "okay";
};
&usb1 {
status = "okay";
};
File location: meta-trenz_altera/recipes-kernel/linux/
Changes:
Image recipe for minimal console image
File location: meta-trenz_altera/recipes-core/images/
Image recipes:
Added packages/recipes:
Used filesystem: Initial RAM Filesystem (initramfs)
| Date | Document Revision | Authors | Description |
|---|---|---|---|
| |||
| -- | all | -- |
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