Altera Stratix 10 GX and SX based modules

Code								TEI	1000	-	02	-	A	1	I	1	1	-	A
Letter/Digit								1 2 3	4567	8	9 10	11	12	13	14	15	16	17	18
Module type
TEI	Trenz Electronic with Altera FPGA
Module name
1000
Module Revision
01	PCB Revision 1 (initial)
02	Revision 2
Logic Density
A	B	D	F	G	H	K	M	N	P
40	65	85	110	165	166	210	211	250	280
Family, Power option and Transceiver Speed Grade¹⁾
D	F	G	H	K	M	N	P	R	Use for 1SG (FPGA only)
1	2	3	4	5	6	7	8	9	Use for 1SX (FPGA + Quad-core ARM Cortex-A53)
V : SmartVID			L : Low Power			X : Extreme Low Power			Power Option
1	2	3	1	2	3	1	2	3	Transceiver Speed Grade
FPGA Temp range (Tstr. abs. = -65°C to +150°C)
Commercial (Tj = 25 °C - 85 °C)					Extended (0/+100 °C)						Industrial (–40 °C / +100 °C)
C					E						I
DDR memory
0	Not populated
1	TEI1000: 1GByte							Industrial		2 x512Mbit - IS43QR16256B-083RBLI					#32191
Flash memory
0	Not populated							-		-					-
1	TEI1000: 64MByte							Industrial		1x MT25QU512ABB8E12-0SIT					#28753
eMMC
-	Not present
0	Not populated
Other options (Connectors, custom options)
Module		Variation		Description
All		A		Standard assembly variant

1) Intel® Stratix® 10 GX/SX Device Overview. Available Options