To configure the flash memory of some modules with Intel FPGA(/SoCs from Trenz Electronic, a .jic file is needed. This file is built from the .sof file from the Quartus project and optionally the .hex file from the software application.
This is a short tutorial on how to create the .jic file.
More detailed instructions can be found directly on the Intel website:
Prepare Quartus Project:
Prepare Nios II software project:
Prepare Nios V software project:
elf2flash --input path/to/sw_example.elf --output path/to/sw_example.srec \ --reset <flash memory controller base address + CPU reset offset> \ --base <flash memory controller base address> --end <flash memory controller end address> \ --boot <quartus_installation_path>/niosv/components/bootloader/niosv_bootloader.srec //check directory for correct bootloader file name riscv32-unknown-elf-objcopy --input-target srec --output-target ihex path/to/sw_example.srec path/to/sw_example.hex
Do following steps to convert the .sof + .hex file to a .jic file:
Make the following settings in the Convert Programming File window
File name: specify the target directory and the output file name
Highlight Flash Loader in Input files to convert window
Click Add Device..., select correct Device family and Device name and click OK
Highlight SOF Data in Input files to convert window
Click Add File..., browse to the .sof file you want to convert and click open
Highlight selected .sof file
You can use the Quartus Programmer to program the flash configuration device with the .jic file.