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Trenz Electronic TE0728 is an automotive-grade FPGA module integrating an Automotive Xilinx  Zynq-7 FPGA, two Ethernet transceivers (PHY) , DDR3 SDRAM, QSPI Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips. 

Within the complete module only Automotive components are installed.

All this in a compact 6 x 6 cm form factor, at the most competitive price.

Refer to for the current online version of this manual and other available documentation.

Key Features

  • Xilinx XC7Z020-1CLG484Q (Automotive) [XA7Z014S is available on other assembly options]
    • Package: CL/CLG484
    • Speed Grade: -1
    • Temperature Grade: Expanded (-40 to +128 °C)
  • Dual-Core ARM Cortex-A9 MPCore
  • DDR3 SDRAM, up to 512MB, up to 1066 Mb/s, connected to PS  [different size is available on other assembly options]
  • QSPI Flash memory (with XiP support) [different size is available on other assembly options]
  • Programmable SIT8918A , PS clock generator
  • 2 Kbit serial EEPROM
  • Three user LEDs
  • CAN transceiver (PHY)
  • Temperature compensated RTC (real-time clock)
  • 2 x 100 MBit Ethernet transceiver (PHY)
  • Board to Board (B2B)
    • Plug-on module with 3 x 80-pin Samtec Micro Tiger Eye(TM) high-speed connectors
  • I/O Interface
    • 42x MIO
    • 200x HR
    • 128x PS IO
    • 0x GTP Transceiver
    • 0x GTX Transceiver
  • Power Supply
    • 12 V power supply with watchdog
  • Others:
    • Dimensions: 6 x 6 cm
    • Rugged for shock and high vibration
    • On-board high-efficiency DC-DC converters
    • System management and power sequencing
    • eFUSE bit-stream encryption
    • AES bit-stream encryption
    • Evenly-spread supply pins for good signal integrity

Block Diagram

TE0728 block diagram

Main Components

TE0728 main components

  1. DDR3 SDRAM, U1
  2. Xilinx Automotive XA7Z020-1CLG484Q ,U2
  3. 100 MBit Ethernet transceiver, U3
  4. 100 MBit Ethernet transceiver, U10
  5. User LED Green, D4
  6. Real Time Clock, U7
  7. Standard Clock Oscillators, U5
  8. 64 Kbit I2C EEPROM, U11
  9. CAN Tranceiver, U16
  10. QSPI NOR Flash memory, U13
  11. Standard Clock Oscillators, U14
  12. Low-Quiescent-Current Programmable Delay Supervisory Circuit, U15
  13. Low-Quiescent-Current Programmable Delay Supervisory Circuit, U12
  14. B2B connector , JM2
  15. B2B connector , JM3
  16. B2B connector , JM1

FPGA (U2), DDR3 SDRAM (U1) and QSPI (U13) can be  varied on other assembly option, for more information contact us. 

Initial Delivery State

Storage Device



Quad SPI Flash


Not Programmed

EEPROMU11Not Programmed
Initial delivery state of programmable devices on the module

Configuration Signals


FPGA BankPinB2BSignal StateBoot Mode







HighSD Card
Boot process.




J2-7InputComes from Carrier
Reset process.

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

TE0728 Module has 3 B2B connectors and every connector has 80 pins (2 row, 40 pins).

FPGA bank number and number of I/O signals connected to the B2B connector:

FPGA BankTypeB2B ConnectorI/O Signal CountVoltage LevelNotes
13HRJ148 Single ended (24 Diff)VCCO_13variable from carrier
500MIOJ14 Singel ended3.3V
501MIOJ238 Singel endedVMIO1variable from carrier
33HRJ334 Single ended (17 Diff)3.3V



20 Single ended (10 Diff)

22 Single ended (11 Diff)

General PL I/O to B2B connectors information

Ethernet PHY

Ethernet pins connections to Board to Board (B2B). Ethernet components ETH1 and ETH2 are connected to B2B connector J3.

CTREFJ3-57J3-25InMagnetics center tap voltage
LED1J3-55J3-23OutLED Yellow on carrier, multiple usage-ACK
LED3J3-51J3-19OutLED Green on carrier, multiple usage-Link
RESET_NM15R16InActive low PHY Reset
Ethernet PHY B2B connectors.


CAN pins connections to Board to Board (B2B).

CAN B2B connectors.

JTAG Interface

JTAG access to the Xilinx XA7Z020 FPGA through B2B connector JM2.

JTAG Signal

B2B Pin

JTAG pins connection

MIO Pins

MIO PinConnected toB2BNotes
MIO0MIO0-RTC interrupt



-SPI Flash
MIO8/MIO9Tx/Rx-CAN Transceiver
MIO10...MIO13IO_0 ... IO_3J1GPIO
MIO40...MIO48CLK, Cmd, Data0...Data3, wp, cdJ2SD
MIO48PS_MIO48_501J2LED Red on Carrier
MIO49PS_MIO49_501J2LED Yellow on Carrier
MIO50PS_MIO49_501J2LED Green on Carrier
MIO52/MIO53UART_Txd / UART_RxdJ2UART transfer/recieve
MIOs pins

On-board Peripherals

QSPI FlashU13---
RTCU7Real Time Clock
DDR3 SDRAMU1Volatile Memory
EthernetU3, U10Two 100 Mbit Ethernet PHY
CAN TransceiverU16---
User LEDD4Green LED
OscillatorsU14, U7, U5Clock Sources
On board peripherals

Quad SPI Flash Memory

On-board QSPI flash memory is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency.

Quad SPI Flash (U7) is connected to the Zynq PS QSPI0 interface via PS MIO bank 500.

MIO PinSchematicNotes
Quad SPI interface MIOs and pins


The RTC has an I2C Bus (2-wire SerialInterface) and offers temperature compensated time. The STC-Smart Temperature Compensation is calibrated in the factory and leads to a very high time-accuracy.

RTC interrupt is connected to MIO0 connected to Bank 500 through pin G6.

MIO PinI2C AddressDesignatorNotes
MIO14...150x56U7Slave address
I2C Address for RTC


The Microchip Technology Inc. 24xx64 is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. The 24xx64 also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space.

MIO PinI2C AddressDesignatorNotes
MIO14...150x50U11Slave address
I2C address for EEPROM


DesignatorColorConnected toActive Level
D4GreenBank 33 - V18High
On-board LEDs


The TE0728 SoM has a volatile DDR3 SDRAM, 256Mx16bit (512MB), IC for storing user application code and data. Size of DDR3 can be varied in different assembly versions.

  • Part number: NT5CB256M16CP-DIH
  • Supply voltage: 1.5V
  • Organization: 256M x 16 bits

DDR3 SDRAM can be varied on demand for other assembly options. DDR3 can have density of maximum 512MB due to available addressing. The maximum possible speed for DDR3 SDRAM is 1066 Mb/s.


There are two 100 MBit Extreme Temperature Ethernet provided by Texas Instrumen on the board. Datasheet is provided at TI website. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz sources is provided from MEMS Oscillator. There is no sharing of signals for the two PHY's.

PUDC pin is connected with pull-up to 3.3V those pre-configuration pull-ups are disabled by default. Strapping resistor exist to change the PUDC mode.

BankSignal NameETH1ETH2Signal Description
34ETH-RSTM15R16Ethernet reset, active-low.

Ethernet management clock.

34MDIOM16T16Ethernet management data.
34ETH_TX_D0J22N22Ethernet transmit data 0. Output to Ethernet PHY.
34ETH_TX_D1M17P21Ethernet transmit data 1. Output to Ethernet PHY.
34ETH_TX_D2K21P22Ethernet transmit data 2. Output to Ethernet PHY.
34ETH_TX_D3M22R21Ethernet transmit data 3. Output to Ethernet PHY.
34ETH_TX_ENJ21M21Ethernet transmit enable.
34ETH_RX_D0L17R18Ethernet receive data 0. Input from Ethernet PHY. 
34ETH_RX_D1K18R19Ethernet receive data 1. Input from Ethernet PHY. 
34ETH_RX_D2J18T18Ethernet receive data 2. Input from Ethernet PHY. 
34ETH_RX_D3J20T19Ethernet receive data 3. Input from Ethernet PHY. 
34ETH_RX_DVN17P15Ethernet receive data valid.
Ethernet PHY to Zynq SoC connections

CAN Transceiver

Controller Area Network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is available in TI website. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps. 

BankSignal nameNotes
500D - TxDriver Input
500R - RxReciever Output
CAN Tranciever interface MIOs


DesignatorDescriptionFrequencyUsed as
U14MEMS Oscillator50 MHzPS_CLK
U5MEMS Oscillator25 MHzEthernet PHY Clock
U7RTC (internal oscillator)32.768 KHzCLKOUT of RTC is not connected

Power and Power-On Sequence

Power Supply

Power supply with minimum current capability of 2.5A for system startup is recommended.

Power Consumption

Power Input PinTypical Current
Power Consumption

* TBD - To Be Determined

Power Distribution Dependencies

Power Dependencies

Power on Sequence

The TE07028 SoM meets the recommended criteria to power up the Xilinx Zynq properly by keeping a specific sequence of enabling the on-board DC-DC converters and regulators dedicated to the particular functional units of the Zynq chip and powering up the on-board voltages. When the U8 and U9 generates PWRGD signal, it turns on the U4 which generates PWRGD_3.3V, it turns on the U6 and it generates PWROK signal which is connected to MR. Whenever the supply voltage for U12 drops down below the threshold it resets the system. Actually it resets the system when all regulators are working.

Power On Sequence

Voltage Monitor Circuit

The microprocessor supervisory circuits monitor system voltages asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user adjustable delay time after the SENSE voltage and MR return above their thresholds. Datasheet is available in Texas Instruments website.

Voltage Monitor Circuit

Power Rails

Power Signal


JM1 Pin


JM2 Pin


JM3 Pin

VIN1,3--InputSupply voltage from carrier board.
VBATT-1-OutputRTC Supply voltage
3.3V19425,57OutputInternal 3.3V voltage level.


InputVariable and supplied by carrier


-5-OutputInternal 1.8V voltage level.
Module power rails.

Bank Voltages


Schematic Name


I/O TypeNotes


2.5V or 3.3VMIOsupplied by carrier.
13VCCO_131.8V or 3.3VHRSupplied by the carrier board. J1
333.3V3.3VHRSupplied by carrier board. J3


Supplied by the carrier board. J2, J3

Zynq SoC bank voltages.

Board to Board Connectors

6 x 6 modules use two or three Samtec Micro Tiger Eye Socket Strip on the bottom side.
  • 3 x REF-189018-01 (compatible to TEM-140-02-03.0-H-D-A ), (80 pins, "40" per row)

Connector SpecificationsValue
Insulator materialBlack Liquid Crystal Polymer
Stacking height6 mm
Contact materialPhosphor-bronze
PlatingAu or Sn over 50 μ" (1.27 μm) Ni
Current rating2.9 A per pin (2 pins powered)
Operating temperature range-55 °C to +125 °C
RoHS compliantYes
Connector specifications.
Connector Mating height

When using the same type on baseboard, the mating height is 6mm. Other mating heights are possible by using connectors with a different height

Order numberConnector on baseboardcompatible toMating height
REF-189018-01TEM-140-02-03.0-H-D-A6 mm

SEM-140-02-03.0-H-D-ATEM-140-02-03.0-H-D-A6 mm

The module can be manufactured using other connectors upon request.

Connector Speed Ratings

The LSHM connector speed rating depends on the stacking height; please see the following table:

Stacking heightSpeed rating
6 mm, Single-Ended12 GHz
10 mm, Differential

17 GHz

6 mm, Single-Ended14.5 GHz
10 mm, Differential17.5 GHz
Speed rating.
Current Rating

Current rating of  Samtec Micro Tiger Eye Connector™ LSHM B2B connectors is 2.9A per pin (2 adjacent pins powered).

Connector Mechanical Ratings
  • Shock: 100G, 6 ms Sine
  • Vibration: 7.5G random, 2 hours per axis, 3 axes total

Manufacturer Documentation

  File Modified
PDF File SEM-140-02-03.0-H-D-A.pdf 11 02, 2019 by Pedram Babakhani
PDF File TEM-140-02-03.0-H-D-A.pdf 11 02, 2019 by Pedram Babakhani

Technical Specifications

Absolute Maximum Ratings

VIN supply voltage-0.365VTPS54260-Q1 datasheets.
VMIO-0.53.6VPS MIO I/O supply voltage
VCCO-0.53.6VPL supply voltage for HR I/O banks
Storage Temperature-40+85°C
Absolute maximum ratings

Recommended Operating Conditionse

SymbolMinMaxUnitsReference Document
VIN supply voltage3.560VTPS54260-Q1 datasheets.
VMIO1.713.465VSee Xilinx DS187 data sheet.
VCCO1.143.465VSee Xilinx DS187 datasheet.
Operating Temperature-40+105°C
Recommended operating conditions

Physical Dimensions

  • Module size: 60 mm × 60 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 7 mm.

  • PCB thickness: 1.6 mm.

Physical Dimension

Currently Offered Variants 

Trenz shop TE0728 overview page
English pageGerman page
Trenz Electronic Shop Overview

Revision History

Hardware Revision History

Product changes can be seen in PCN page.



  • U1 DDR3 IC changed from NT5CB256M16CP-DIH to NT5CC256M16CP-DIH
  • Net DDR3-ODT0: added series resistor R55
  • Added Traceability pad
  • Net PS-POR-B: added pull-down resistor R56
  • ...
  • ...
  • ...
Hardware Revision History

Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

Document Change History


John Hartfiel

  • smale style update

2019-05-16v. 367Pedram Babakhani
  • initial release



  • --
Document change history.


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Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

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Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.


Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

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