TE0865 TRM

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Overview

The Trenz Electronic TE0865 is a high-performance MPSoC module integrating a Xilinx Zynq UltraScale+ ZU17EG (other assembly options for the FPGA are available), up to 8 GByte DDR4 SDRAM with ECC on PS, up to 8 GByte DDR4 SDRAM on PL, 256 MByte Flash memory for configuration and operation, Gigabit Ethernet PHY, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking connections. 

The prototype configuration of TE0865 will be available with many configuration options available that you can customize to meet your specific needs.

All parts are at least extended temperature range of 0°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Refer to http://trenz.org/te0865-info for the current online version of this manual and other available documentation.

Key Features

• SoC/FPGA
  
  • Package: C1760
  • Device: ZU11, ZU17, ZU19*
  • Engine: EG*
  • Speed: -1, -2,*, **
  • Temperature: I, E,*, **
• RAM/Storage
  • DDR4 on PS with ECC
    
    • Data width: 64 bit
    • Size: def. 4GB*
    • Speed: 2400 (Gb/s) ***
  • DDR4 on PL
    • Data width: 64 bit
    • Size: def. 4GB*
    • Speed: max 2666 (Gb/s) ***
  •  eMMC
    • Data width: 8 Bit
    • size: def. 8 GB *
  • Dual QSPI boot Flash in dual parallel mode (size depends on assembly version)
    • Data width: 8bit
    • size: def. 64MB *
  • MAC address serial EEPROM with EUI-48™ node identity (Microchip 24AA025E48)
• On Board
  
  • Intel Max 10 FPGA as CPLD
  • 6x MEMS Oscillator
  • Gigabit Ethernet transceiver PHY (Marvell Alaska 88E1512)
  • Hi-speed USB2 ULPI transceiver with full OTG support (Microchip USB3340C)
• Interface
  • 96 HD I/Os
  • 240 HP I/Os
  • 4x PS GTR
  • 3x Samtec Accelerate HD B2B connector
  • 21 MIOs
• Power
  
  • 12V input supply voltage
  • Variable Bank IO Power Input
• Dimension
  • 7.5 cm x 10 cm
• Notes
  • * depends on assembly version
  • ** also non low power assembly options possible
  • *** depends on used U+ Zynq and DDR4 combination

Block Diagram

Main Components

1. ZYNQ Ultrascale+ MPSoC FPGA, U30
2. PL DDR4 SDRAM, U9, U10, U28, U29
3. PS DDR4 SDRAM, U5...U8, U11
4. Intel MAX 10 FPGA, U46
5. eMMC RAM, U1
6. Dual QSPI Flash, U32, U33
7. Crypto Authentication IC, U19
8. OPTIGA Trust M Authentication IC, U16
9. EEPROM MAC Address, U14
10. USB2.0 Transceiver, U2
11. Gigabit Ethernet Transceiver, U17
12. B2B Connector, J2
13. B2B Connector, J3
14. B2B Connector, J1
15. B2B Connector, J4
16. Power Terminal, J5
17. Configurable Regulator, U20

Initial Delivery State

Configuration Signals

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

For detailed information about the pin-out, please refer to the Pin-out table.

MGT Lanes

The Xilinx Zynq UltraScale+ device used on the TE0865 module has 4x Lanes MGT transceivers connected to Bank 505 PSGTR. All 4x lanes are wired directly to B2B connector J3B consisting of one transmit and one receive (TX/RX) differential pairs, four signals total per one MGT lane. Furthuremore, MGT clocks are sourced by oscillators U3 and U4 at 27 and 100 MHz respectively.
Following table lists lane number, FPGA bank number, transceiver type, signal schematic name, board-to-board pin connection and FPGA pins connection:

There are 3 clock sources for the GTR transceivers. B505_CLK0 is connected directly to B2B connector JM3, so the clock can be provided by the carrier board. Clocks B505_CLK1 and B505_CLK3 are provided by the on-board clock generator (U10). As there are no capacitive coupling of the data and clock lines that are connected to the connectors, these may be required on the user’s PCB depending on the application.JTAG Interface

JTAG access to the UltraScale+ MPsoC FPGA through B2B connector J3B.

JTAG access to the system controller CPLD, Intel MAX10 FPGA(U46) through B2B connector J2B.

I2C Addresses

MIO Pins

Test Points

On-board Peripherals

System Controller CPLD

The TE0865 is equipped with an Intel MAX 10 as System Controller CPLD (U46). Please check further information in the TE0865 CPLD page.

Dual QSPI Flash Memory

The TE0865 is equipped with dual 128 Mb (256 Mb) QSPI flash memory, U32 and U33 for configuration and operation storage.

eMMC Memory

The TE0865 is equipped with an eMMC Flash memory IC(U1) connected to the PS MIO pins MIO13..MIO22. 

Gigabit Ethernet

On-board Gigabit Ethernet PHY (U17) is provided with Marvell Alaska 88E1512 IC (U17). The Ethernet PHY RGMII interface is connected to the ZynqMP Ethernet3 PS GEM3. I/O voltage is fixed at 1.8V for HSTL signaling. The reference clock input of the ETH is supplied from an on-board 25.00 MHz oscillator (U18).

USB2.0 Transceiver

Hi-speed USB2.0 transceiver (U2) is provided with USB3340 from Microchip. The transceiver is connected to the PS MIO via MIO52..63. The I/O voltage is fixed at 3.3V (VBAT) and PHY reference clock input is supplied from the on-board 24.00 MHz oscillator (U13).

EEPROM

There is an EEPROM (U14) provided on the module TE0865 for storing MAC Address. The EEPROM has the I²C bus address 0x53.

Crypto Authentication

The TE0865 is equipped with an authentication IC, ATECC608A (U19) which includes an EEPROM array for storage of up to 16 keys, certificates, miscellaneous read/write, read-only or secret data, consumption logging, and security configurations. Access to the various sections of memory can be restricted in a variety of ways and then the configuration can be locked to prevent changes.

OPTIGA Authentication

The TE0865 is equipped with an OPTIGA Trust M  IC, SLS32AIA010MH (U16). The OPTIGA Trust M comes with up to 10kB of user memory that can be used to store X.509 certificates and data. OPTIGA Trust M is based on Common Criteria (CC) Certified EAL6+ (high) hardware enabling it to prevent physical attacks on the device itself and providing high assurance that the keys or arbitrary data stored cannot be accessed by an unauthorized entity. The OPTIGA Trust M is connected via I²C with address of 0x30.

PL DDR4 SDRAM

The TE0865 SoM has four volatile DDR4 SDRAM ICs connected to Programmable Logic(PL) for operations, storing and streaming data.

• Part number:  MT40A1G16RC-062E*
• Supply voltage: 1.2V
• Speed: 3200 MT/s*
• Temperature: -40 ~ 95 °C*

* depends on assembly version

PS DDR4 SDRAM

The TE0865 SoM has five volatile DDR4 SDRAM ICs connected to Processing System (PS) for operations, storing and streaming data.

• Part number:  MT40A1G16RC-062E*
• Supply voltage: 1.2V
• Speed: 3200 MT/s*
• Temperature: -40 ~ 95 °C*

* depends on assembly version

Clock Sources

Power and Power-On Sequence

Power Supply

Power supply with minimum current capability of 3.0 A for system startup is recommended.

Power Consumption

* TBD - To Be Determined

Power Distribution Dependencies

Power-On Sequence

Voltage Monitor Circuit

The LTM4700 (U20) is a dual 50A or single 100A step-down µModule(power module) DC/DC regulator featuring remote configurability and telemetry-monitoring of power management parameters over standard I2C-based digital interface protocol.

Power Rails

Bank Voltages

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Components are mainly classified in 3 temperature groups, according to range specifications: commercial: 0°C - 75°C extended: 0°C - 85°C industrial: -40°C - 85°C

Classification of the module can be locked up here: Article Number Information i.e.: TE0803-03-5D"I"21-AS (The I indicates industrial)

The actual operation temperature range depends on the FPGA/SoC design/utilization and cooling, as well as other variables. Please note: These are only indications!

Physical Dimensions

• Module size: 75 mm × 100 mm.  Please download the assembly diagram for exact numbers.

• Mating height with standard connectors: 5 mm.

PCB thickness: 2 mm.

Currently Offered Variants 

Revision History

Hardware Revision History

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

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