System LED D1

LED D1 is connected to the DONE pin. The DONE pin is powered by the VCCAUX supply.
The FPGA actively drives the DONE pin Low during configuration. Thus, LED D1 is unconditionally turned off during configuration.
To have LED D1 turned on or off after successful configuration, please see Recommended Design Tools Settings.

 

DONE LED D1 (bottom side).

User Leds D5 to D8

TE0320 is provided with 4 user LEDs. A LED is lit when the corresponding signal listed in the table below is set high (logical 1).


LED

signal

FPGA ball

FPGA pin

bank

D5

UL1

R20

IO_L22N_1

1

D6

UL2

V23

IO_L21P_1

1

D7

UL3

R19

IO_L22P_1

1

D8

UL4

U24

IO_L23N_1
VREF_1

1

User LEDs signal details.
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