Page History

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NIOS II Design with SDRAM Controller controller, flash memory test and 5 different LED sequences, that can be toggled using the user button.

Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.

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Release Notes and Know Issues

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Hardware

Complete List is available on <design_name>/board_files/*_devices.csv

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Design supports following carriers:

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Download

Reference Design design is only usable with the specified Quartus version. Do never use different Versions versions of Quartus Software software for the same Projectproject.

Reference Design is available on:

• TEI0001 "Test Board" Reference Design

Design Flow

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The Trenz Electronic FPGA Reference Designs are TCL-script based projects. Command files for execution will be generated with "_create_win_setupTo create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_createproject_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel  Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

1. Open create_project_win.cmd/create_project_linux.sh:
   Image Added'Create Project' GUI example
2. Select Board in "Board selection"
3. Click on "Create project" button to create project
4. Open _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
5. Press 0 and enter to start "Module Selection Guide"
6. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
   
   1. (optional for manual changes) Select correct device and Quartus install path on "design_basic_settings.cmd"/ "quartus installation path in "<design_name>/settings/design_basic_settings.sh" and create Quartus project with "quartus_tcl"

Launch

Programming

MAX10 Flash

1. Connect the Module to USB-Port
2. Open create_project_batchmodewin.cmd"/"quartus_create_project_batchmodelinux.sh
3. Select correct board in "Board selection"

Launch

Programming

JTAG

Not used on this Example.

MAX10 Flash

1. Connect the Module to USB-Port
2. Open Quartus project with "quartus_open_existing_project_guimode.cmd"/ "quartus_open_existing_project_guimode.sh"
3. Open the Quartus Prime Programmer from Tools → Programmer
4. If the Arrow-USB-Blaster is not visible:
   1. Click "Hardware Setup..."
   2. Choose at the drop-down menu "Currently selected hardware" Arrow-USB-Blaster [USB0]
   3. Close "Hardware Setup"
5. If the correct configuration file is not set:
   1. Delete other files
   2. Click "Add file..."
   3. Select the correct .pof file (created project file: <design_name>/quartus/output_files/test_board.pof or prebuilt file: <design_name>/prebuilt/<board_part_short_name>/programming_files/*.pof)
6. Click "Start"

Usage

1. Prepare Hardware like described on section Programming
2. Connect UART USB (most cases same as JTAG)

UART

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1. Connection Type: Serial
2. COM Port: Win OS → see device manager, Linux OS → see  dmesg |grep tty
3. Speed: 115200

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1. Flash test is running

1. Click on "Program device" button
   1. if prebuilt files are available: select "Program prebuilt file"
   2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
   3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
2. Click on "Start program device" button

JTAG

Not used on this example.

Usage

1. Prepare Hardware like described on section Programming
2. Connect UART USB (most cases same as JTAG)

UART

1. Open Serial Console (e.g. PuTTY)
   1. COM Port: Win OS see device manager, Linux OS see  dmesg | grep tty  (UART is *USB1)
   2. Speed: 115200
2. Press reset button on the module
3. Toggle between following modes by pressing user button
   1. Spirit level
   2. Winbond SPI flash memory test
   3. Shift register sequence
   4. Knightrider sequence
   5. Case statement sequence

System Design - Quartus

Block Design

Scroll Title
anchor Figure_BD title Block Design - Project
Image AddedBlock Design - test_board.bdf

Scroll Title
anchor Figure_BD title Block Design - Platform Designer
Image AddedBlock Design - NIOS_test_board.qsys

Software Design - SDK

Application

Template location: <design_name>/source_files/software/

test_board

Software example to test TEI0001 module.

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Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  revision got to "Change History"   of this page and select older document revision number.

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