NIOS II Design with SDRAM controller, flash memory test and different LED sequences.
Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.
- Quartus Prime Lite 20.1
- NIOS II
- User Flash memory
- SDRAM memory
- 3-axis Accelerometer
- User LEDs
- User buttons
Release Notes and Know Issues
|Issues||Description||Workaround||To be fixed version|
|No known issues||---||---||---|
|Quartus Prime Lite||20.1||needed|
|NIOS II SBT for eclipse||---||optional|
HardwareComplete List is available on <project folder>/board_files/*_devices.csv
Design supports following modules:
|Module Model||Board Part Short Name||PCB Revision Support||DDR||QSPI Flash||Others||Notes|
*used as reference
Design supports following carriers:
*used as reference
Additional HW Requirements:
|USB cable for JTAG/UART||Check Carrier Board and Programmer for correct type|
For general structure and of the reference design, see Project Delivery - Intel devices
<project folder>/source_files/<Board Part Short Name>/quartus
Quartus project will be generated by TE Scripts
optional, source files for specific assembly variants
<project folder>/source_files/<Board Part Short Name>/software
Additional software will be generated by TE Scripts
optional, source files for specific assembly variants
|SOPC Information File||*.sopcinfo||File with description of the *.qsys file to create software for the target hardware|
|Programmer Object File||*.pof||FPGA configuration file|
|Diverse Reports||---||Report files in different formats|
|Software Application File||*.elf||Software application for NIOS II processor system|
Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.
Reference Design is available on:
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.
Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.
The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh:
- Select Board in "Board selection"
- Click on "Create project" button to create project
- (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"
Check Module and Carrier TRMs for proper HW configuration before you try any design.
- Connect the Module to USB-Port
- Open create_project_win.cmd/create_project_linux.sh
- Select correct board in "Board selection"
- Click on "Program device" button
- if prebuilt files are available: select "Program prebuilt file"
- using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
- (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
- Click on "Start program device" button
Not used on this example.
- Prepare Hardware like described on section Programming
- Connect UART USB (most cases same as JTAG)
- Open Serial Console (e.g. PuTTY)
- COM Port: Win OS see device manager, Linux OS see dmesg | grep tty (UART is *USB1)
- Speed: 115200
- Press reset button
- Console output depends on used Software project, see Software Design - SDK#Application
System Design - Quartus
The block designs may differ depending on the assembly variant.
Software Design - SDK
Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/
Software example to test TEI0001 module.
- You can toggle between following modes by pressing user button
- Spirit level
- Winbond SPI flash memory test
- Shift register sequence
- Knightrider sequence
- Case statement sequence
Appx. A: Change History and Legal Notices
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