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A plurality of usage combinations of the SPI bus during operation is made available to the user as suggested in Table B below.
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title | Table B: SPI bus modes for operation. |
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description | usage | EZ-USB FX2LP | FPGA | B2B J5 | serial Flash | EZ-USB â—„â-º Flash | custom | master | off (S3 = FX2PON, FX2_PS_EN = 0) | deselected | slave | FPGA â—„â-º Flash | custom | inactive SPI_* = Z | master (SPI_/S = 1) | deselected | slave | B2B J5 â—„â-º Flash | custom | inactive SPI_* = Z | off (S3 = FX2PON, FX2_PS_EN = 0) | master (SPI_/S = 0) | slave | EZ-USB â—„â-º B2B J5 | custom | master SPI_/S = 1 | off (S3 = FX2PON, FX2_PS_EN = 0) | slave | deselected | EZ-USB â—„â-º B2B J5 | custom | slave SPI_/C = Z | off (S3 = FX2PON, FX2_PS_EN = 0) | master (SPI_/S = 1) | deselected |
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Warning |
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Other combinations of master and slave units are neither supported nor recommended. |
SPI Header Connector J3
The offset holes of header J3 allow a removable press fit of standard 0.100 inch header pins to connect flying leads without any soldering necessary.
SPI signals are made available on the dedicated header J3 accessible through an SPI programmer with flying leads as described in the table below.