...
| Scroll Title |
|---|
| title | Description of FPGA IIC Interface with FX2 microcontroller |
|---|
|
Pin Name
Schematic | Pin Name FPGA
FPGA Direction | Pin Name FX2
FX2 direction | Description | In the reference design case (1) |
|---|
| SDA, SCL and IFCLK are strictly necessary for every standard I2C communication/transaction. They are used in every Logical Architecture Layer or FX2 microcontroller firmware. | | SDA | SDA Bidirectional | SDA Bidirectional | This pin used to write/read x byte(s) from an y I2C address. | It is used in this two way. - FX2 μC sends a (USB) received MB Command to XPS_I2C_SLAVE's
FX22MB_REGs
through I2C connection ( FPGA's MicroBlaze will read this
value using I2C_WRITE command
in the format specified
by MicroBlaze API Commands (MB Commands)) - FX2 μC retrieves the (auto)response (if any) to a previous MB command from
XPS_I2C_SLAVE's MB2FX2_REGs through I2C (a polling procedure using
GET_INTERRUPT command will be used and the autoresponse's retrieving
should be enabled in advance using SET_INTERRUPT command)
| | SCL | SCL Input | SCL Output | USB I2C serial clock | USB I2C serial clock | | IFCLK | IFCLK Input | IFCLK Input | USB 48MHz clock | USB 48MHz clock | | INT0 is used in I2C transaction between XPS_I2C_SLAVE custom IP block and USB FX2 microcontroller, in reference design (2). | | INT0 | INT0 Output | PA0 Input | Pin value is rised by FPGA to request the execution of
a service routine (an ISR or nota polling) by USB FX2 μC should | If XPS_I2C_SLAVE custom IP block and a MB Command is used,
the following behavior should be observed.
After MB Command execution, the MB - may writes data (status value) to MB2FX2_REG0/MB2FX2_REG1/MB2FX2_REG2REGs (0 to 2)
- the pin INT0 is rised. This pin is connected to PA0/INT0 pin of FX2 μC.
When the FX2 microcontroller's firmware read the rise of pin INT0
(=1 because MicroBlaze writes data to MB2FX2_REG0)
it set the firmware variable FPGA_INT0 to 1.
A polling procedure may read or not MB2FX2_REGs (0 to 2). | | INT1 is NOT is used in I2C transaction between XPS_I2C_SLAVE custom IP block and USB FX2 microcontroller, in reference design (2). | | INT1 | INT1 Input | PA1 Output | Pin value is rised by USB by USB FX2 μC µC to request the execution of
a service routine service routine (an ISR for example) by FPGA's MicroBlaze
or the execution of some function by a custom IP block. | NOT USED The FOR I2C transaction: the interrupt (to MicroBlaze) used
by XPS_I2C_SLAVE is internal to FPGA and is not tied to an
external pin. |
|
(1) Reference design: Logical Architecture Layer = Reference Architecture Layer and FX2 firmware= Reference FX2 firmware
...