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States | Blink Sequence | Comment | |||
---|---|---|---|---|---|
IDLE | ooooooooooooooooooo* | Power Sequencing can not start. RESETN is active. | |||
Stage 01 | ooooooooooooooooo*o* | First enable signal (EN_PS_PL) is activated. | Stage 1 | ooooooooooooooo*o*o* | The correct voltage in one of the following nets are failed: VCCINT, VCINT_IO, VCCBRAM, PSINTLP, PSINTFP, PSINTFP_DDR, MGTAVCC |
Stage 2 | oooooooooooooooooooooooooooo*o*o* | o*The correct voltage in one of the following nets are failed: PSAUX, PSADC, PSIO, VCCAUX, VCCAUX_IO, PS_DDR_PLL, PSMGTRAVCC, MGTVCCAUX, PSPLL, MGTAVTT | |||
Stage 3 | oooooooooooooooooooooooo*o*o*o*o* | The correct voltage in one of the following nets are failed: VCC_B88_HD, PS_MGTRAVTT, DDR_2V5 , DDR_1V2 | |||
Stage 4 | ooooooooo*oooooooooooo*o*o*o*o* | The correct voltage in one of the following nets are failed: VCCINT_AMS, APRE_1V15, APRE_3V3 | |||
Stage 5 | oooooooooooooooo*o*o*o*o*o*o* | The correct voltage in one of the following nets are failed: ADC_AVCC, ADC_AVCCAUX, DAC_AVCC, DAC_AVCCAUX, DAC_AVTT | |||
WAIT_RDY / RDY and DONE='0' | oooooooooooo*o*o*o*o*o*o*o* | All power good signals are checked again./ Power is ok. But the FPGA is not yet configured. | |||
pg_all = '0' | ooooo | ERROR | o*o*o*o*o*o*o*o*o*o* | An error occuresThe main power supply must be switched off. | |
USR (RDY and DONE='1') | User defined | Power is ok and the FPGA is configured successfully.LED can be controlled by user, when Power is OK and FPGA part is programmed (DONE signal is high) |
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