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Scroll Title
anchorTable_SIP_ETH
titleRJ45 LAN Socket information

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Pin SchematicConnected toNotes
2PHY_MDI0_PB2B, JB1
3PHY_MDI0_NB2B, JB1
4PHY_MDI1_PB2B, JB1
5PHY_MDI1_NB2B, JB1
6PHY_MDI2_PB2B, JB1
7PHY_MDI2_NB2B, JB1
8PHY_MDI3_PB2B, JB1
9PHY_MDI3_NB2B, JB1
VCCETH-VCCB2B, JB1
Green LEDETH1_LED0Intel MAX 10, U6Link/Activity indicator
Yellow LEDETH1_LED1Intel MAX 10, U6Speed indicator


Jumpers

There are three Jumpers provided to choose the CRUVI Extension power supply.

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anchorTable_SIP_Jumpers
titleJumpers information

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DesignatorSchematicConnected toNotes
J14VCCIO_CCB2B, JB2CRUVI C
J16VCCIO_CBB2B, JB2CRUVI B
J17VCCIO_CAB2B, JB2CRUVI A


Pin Header

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anchorTable_SIP_SMD
titleJumpers information

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DesignatorSchematicConnected toNotes
J3VBATB2B, JB1


Test Points

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hiddentrue
idComments

you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalB2BNotes
10PWR_PL_OKJ2-120


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Scroll Title
anchorTable_OBP
titleOn board peripherals

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D1...8
Chip/InterfaceDesignatorNotes
Intel MAX 10U6
FTDIU8SDIO ExpanderU4EEPROMU10OscillatorU7LEDsU8
SDIO ExpanderU4
EEPROMU10
OscillatorU7
LEDsD1...8
DIP SwitchS1
Push ButtonsS2, S3


FTDI FT2232H

The FTDI chip (U8) converts signals from USB2 to variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip which is used in  Multi-Protocol Synchronous Serial Engine (MPPSE) mode for JTAG. 

The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U10.

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anchorTable_OBP_FT2232H
titleFTDI chip interfaces and pins

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PinSchematicConnected toNotes
ADBUS0TCKFPGA Bank 1B, U6JTAG interface
ADBUS1TDIFPGA Bank 1B, U6
ADBUS2TDOFPGA Bank 1B, U6
ADBUS3TMS

FPGA Bank 1B, U6

BDBUS0F_UART_TXFPGA Bank 1B, U6UART Transmitter output
BDBUS1F_UART_RXFPGA Bank 1B, U6UART Receiver Input
OSCIOSCIOscillator, U7Clock 12 MHz
EECSEECSEEPROM, U10EEPROM Contains FTDI configuration
EECLKEECLKEEPROM, U10
EEDATAEEDATAEEPROM, U10
DM/DPFD_N/ FD_PMicro USB, J15USB to UART
nRESET3.3V3.3V


LEDs

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titleOn-board LEDs

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DesignatorColorSchematicConnected toActive LevelNote
D2GreenLED3FPGA Bank 3Active High
D3GreenLED5FPGA Bank 3Active High
D4GreenLED7FPGA Bank 3Active High
D5GreenLED4FPGA Bank 8Active High
D6GreenLED6FPGA Bank 2Active High
D7GreenLED8FPGA Bank 8Active High
D8GreenLED2FPGA Bank 8Active High
D9GreenLED1FPGA Bank 8Active High


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Scroll Title
anchorFigure_PWR_PD
titlePower Distribution


draw.io Diagram
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Power-On Sequence

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