Page History

...

• Xilinx Zynq UltraScale+ MPSoC 784 pin package (options: ZU2CG, ZU2EG, ZU3CG, ZU3EG, ZU4CG, ZU4EV)
• Memory
  - 64-Bit DDR4, 8 GByte maximum
  - Dual SPI boot Flash in parallel, 512 128 MByte maximum
• User I/O
  - 65 x MIO, 48 x HD (all),  156 x HP (3 banks)
  - Serial transceiver: 4 x GTR (+ 4 x GTH transceiver with ZU4CG or ZU4EV MPSoC)
  - Transceiver clocks inputs and outputs
  - PLL clock generator inputs and outputs
• Size: 52 x 76 mm, 3 mm mounting holes for skyline heat spreader
• B2B connectors: 4 x 160 pin
• Si5338A - 4 output PLL
• All power supplies on board, single 3.3V power source required
  - LP, FP, PL separately controlled power domains
• Support for all boot modes (except NAND) and scenarios
• Support for any combination of PS connected peripherals

...