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Overview
The Trenz Electronic TE0xxx-xx ... is an industrial-grade ... module ... based on Xilinx ...CR00040-01 is an CRUVI peripheral module with multiple sensors
Refer to http://trenz.org/tec0850cr00040-info for the current online version of this manual and other available documentation.
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anchor | Table_OV_IDS |
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title | Initial delivery state of programmable devices on the module |
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Storage device name | Content | Notes | Quad SPI Flash | EEPROM | System Controller CPLD |
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EEPROM | MAC Address | at offset 0xFA, 6 bytes |
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Signals, Interfaces and Pins
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- Overview of Boot Mode, Reset, Enables.
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anchor | Table_OV_CNTRL |
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title | Controller signal. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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Name | Connector Pin | Direction | Description |
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Boot Mode | J1-2 | input | high- SD low -QSPI |
Enable | J1-3 | input | .. |
Reset | JTAGSEL | PGOOD | ... |
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Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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orientation | portrait |
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FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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On-board Peripherals
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Notes : - For carrier or stand-alone boards use add subsection for every connector type (add designator on description, not on the subsection title), component which is important for design, for example:
- SDTwo 100 Mbit Ethernet Transciever PHY
- USB
- ETH
- PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDIFMC
- ...
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
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anchor | Table_SIP_B2BOBP |
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title | General PL I/O to B2B connectors informationOn board peripherals |
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orientation | portrait |
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FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level |
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EEPROM | U1 |
| CO2 Sensor | U2 |
| Ambient Light Sensor | U3 |
| Pressure Sensor | U4 |
| RGB LED | D2 |
| Buzzer | LS1 |
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Quad SPI Flash Memory
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
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anchor | Table_OBP_SPI |
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title | Quad SPI interface MIOs and pins |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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JTAG access to the TExxxx SoM through B2B connector JMX.
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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orientation | portrait |
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sortDirection | ASC |
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JTAG Signal | B2B Connector |
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TMS | TDI | TDO | TCK | JTAG_EN |
On-board Peripherals
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
MIO Pin | Schematic | U?? Pin | Notes |
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RTC
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anchor | Table_OBP_RTC |
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title | I2C interface MIOs and pins |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U? Pin | Notes |
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anchor | Table_OBP_I2C_RTC |
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title | On board peripheralsI2C Address for RTC |
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orientation | portrait |
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sortEnabled | false |
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cellHighlighting | true |
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EEPROM
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anchor | Table_OBP_EEP |
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title | I2C EEPROM interface MIOs and pins |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U?? Pin | Notes |
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Quad SPI Flash Memory
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
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anchor | Table_OBP_I2C_SPIEEPROM |
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title | Quad SPI interface MIOs and pinsI2C address for EEPROM |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Schematic | U?? PinI2C Address | Designator | Notes |
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LEDs
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anchor | Table_OBP_RTCLED |
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title | I2C interface MIOs and pinsOn-board LEDs |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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MIO PinDesignator | Schematic | U? Pin | Notes |
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anchor | Table_OBP_I2C_RTC |
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title | I2C Address for RTC |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | widths | sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | I2C Address | Designator | Notes |
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anchor | Table_OBP_EEP |
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title | I2C EEPROM interface MIOs and pins |
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anchor | Table_OBP_I2C_EEPROM |
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title | I2C address for EEPROM |
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LEDs
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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DDR3 SDRAM
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Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3) |
The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number:
- Supply voltage:
- Speed:
- NOR Flash
- Temperature:
Ethernet
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anchor | Table_OBP_ETH |
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title | Ethernet PHY to Zynq SoC connections |
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CAN Transceiver
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anchor | Table_OBP_CAN |
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title | CAN Tranciever interface MIOs |
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anchor | Table_OBP_CLK |
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title | Osillators |
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Programmable Clock Generator
There is a programmable clock generator on-board (U??) provided in order to generate variable clocks for the module. Programming can be done using I2C via PIN header J??. The I2C Address is 0x??.
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anchor | Table_OBP_PCLK |
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title | Programmable Clock Generator Inputs and Outputs |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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IN0
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XAXB
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Power and Power-On Sequence
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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:
- Power on-sequence
- Power distribution
- Voltage monitoring circuit
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For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" . |
Color | Connected to | Active Level | Note |
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D2 | Red | D0 | High |
| D2 | Green | D1 | High |
| D2 | Blue | D2 | High |
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Power and Power-On Sequence
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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: - Power on-sequence
- Power distribution
- Voltage monitoring circuit
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Power Supply
Power supply with minimum current capability of xx A for system startup is recommended.
Power Consumption
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anchor | Table_PWR_PC |
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title | Power Consumption |
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orientation | portrait |
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sortDirection | ASC |
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Power Input Pin | Typical Current |
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VIN | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
Power Supply
Power supply with minimum current capability of xx A for system startup is recommended.
Power Consumption
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anchor | Table_PWR_PC |
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title | Power Consumption |
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* TBD - To Be Determined
Power Distribution Dependencies
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
Power-On Sequence
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anchor | Figure_PWR_PS |
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title | Power Sequency |
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Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
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anchor | Figure_PWR_VMCPD |
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title | Voltage Monitor CircuitPower Distribution |
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Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
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Scroll Title |
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anchor | Table_PWR_PR |
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title | Module power rails. |
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orientation | portrait |
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sortDirection | ASC |
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Power Rail Name | B2B Connector JM1 J1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
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Bank Voltages
J2 Pin | B2B Connector J3 Pin | Direction | Notes |
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VCC | 10 | 1 | - | in |
| VBUS | 12 | - | 1 | n/a | not used |
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anchor | Table_PWR_BV |
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title | Zynq SoC bank voltages. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | widths | sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Board to Board Connectors
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- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
Include Page |
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| PD:6 x 6 SoM LSHM B2B Connectors |
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| PD:6 x 6 SoM LSHM B2B Connectors |
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? x ? modules use two or three Samtec Micro Tiger Eye Connector on CR00040 module uses one Samtec connector at the bottom side.
1 x ?-?, (12 pins, 6 3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)
Operating Temperature: -??°C ~ ??°C
Current Rating: ??A per ContactNumber Contact
Number of Positions: ??
Number of Rows: ??2
Technical Specifications
Absolute Maximum Ratings
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit |
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VCC |
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| V | VBUS |
| n/a | n/a | V | SDA, SCL |
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| V | INT1 |
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| V | INT2 |
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| V | D0,D1,D2 |
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| VV | D3 |
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Recommended Operating Conditions
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anchor | Table_TS_ROC |
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title | Recommended operating conditions. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortEnabled | false |
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cellHighlighting | true |
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Parameter | Min | Max | Units | Reference Document |
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VCC |
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| V | See ???? datasheets. |
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| V | See Xilinx ???? datasheet. |
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| V | See Xilinx ???? datasheet. |
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| V | See Xilinx ???? datasheet. |
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| V | See Xilinx ???? datasheet. |
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| V | See Xilinx ???? datasheet. |
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| V | See Xilinx ???? datasheet. |
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| °C | See Xilinx ???? datasheet. |
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| °C | See Xilinx ???? datasheet. |
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Physical Dimensions
Module size: ?? 32 mm × ?? 18 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? 5 mm.
PCB thickness: ?? 1.6 mm.
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In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM. For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below: https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF
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anchor | Table_VCP_SO |
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title | Trenz Electronic Shop Overview |
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sortEnabled | false |
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Scroll Title |
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Changes | Documentation Link |
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| 01 | Initial |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
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