Page properties |
---|
|
Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board" Date | Version | Changes | Author |
---|
2022-06-15 | 2.2 | - add 'QSPI-Boot mode'
- add 'Get prebuilt boot binaries'
- changed SD-Boot mode chapter
- 'Device Tree' chapter expanded
| TD | 2022-04-21 | 2.1 | | TD | 2022-02-28 | 2.0 | - add yocto to
- Overview → Key Features
- Overview → Requirements
- Design Flow
- Launch
- add section 'Software Design - Yocto'
| TD | 2021-06-15 | 1.2 | - table of content view
- template history
- placed a horizontal separation line under each chapter heading
- replaced <design name> by <project folder>
- changed title-alignment for tables from left to center
- update 19.x to 20.x
| JH,TD | 2020-11-24 | 1.1 | - add fix table of content
- add table size as macro
| JH | -- | 1.0 | -- | -- |
|
Page properties |
---|
|
Important General Note: Export PDF to download, if quartus revision is changed! Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro - Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
- ...
|
Overview
Scroll Ignore |
---|
scroll-pdf | true |
---|
scroll-office | true |
---|
scroll-chm | true |
---|
scroll-docbook | true |
---|
scroll-eclipsehelp | true |
---|
scroll-epub | true |
---|
scroll-html | true |
---|
|
|
Refer to http://trenz.org/tem0007-info for the current online version of this manual and other available documentation.
Key Features
Page properties |
---|
|
Notes : - Add basic key futures, which can be tested with the design
|
Excerpt |
---|
- Libero SoC v2023.1
- SoftConsole v2022.2-RISC-V-747
- PolarfireSoC MSS Configurator v2023.1
- HSS (Hardware System Service) v2023.02
- Microchip polarfire SoC BSP v2022.11
- Yocto Kirkstone
- UART
- ETH
- USB
- I2C
- QSPI flash
- DDR3 memory
- User LED
|
Revision History
Page properties |
---|
|
Notes : - add every update file on the download
- add design changes on description
|
Scroll Title |
---|
anchor | Table_DRH |
---|
title-alignment | center |
---|
title | Design Revision History |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Date | Libero SoC | Project Built | Authors | Description |
---|
2023-08-24 | v2023.1 | ????? | Mohsen Chamanbaz | |
|
Release Notes and Know Issues
Page properties |
---|
|
Notes :- add known Design issues and general notes for the current revision
- do not delete known issue, add fixed version time stamp if issue fixed
|
Scroll Title |
---|
anchor | Table_KI |
---|
title-alignment | center |
---|
title | Known Issues |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Issues | Description | Workaround | To be fixed version |
---|
No known issues | --- | --- | --- |
|
Requirements
Software
Page properties |
---|
|
Notes : - list of software which was used to generate the design
|
Scroll Title |
---|
anchor | Table_SW |
---|
title-alignment | center |
---|
title | Software |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Software | Version | Note |
---|
Libero SoC | v20223.1 | needed | SoftConsole | v2022.2 | needed | PolarfireSoC MSS Configurator | v2023.1 | needed | Yocto | Kirkstone | needed (more information: Yocto KICKstart#Used source files) |
|
Additional software requirement
Scroll Title |
---|
anchor | Table_SW |
---|
title-alignment | center |
---|
title | Additional Software Requirement |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Requirement | Version | Note |
---|
hart software services | v2023.02 | needed | meta-polarfire-soc-yocto-bsp | v2022.11 | needed |
|
Hardware
Page properties |
---|
|
Notes : - list of hardware which was used to generate the design
- mark the module and carrier board, which was used tested with an *
|
Complete List is available on <project folder>/board_files/*_board_files.csv
Design supports following modules:
Scroll Title |
---|
anchor | Table_HWM |
---|
title-alignment | center |
---|
title | Hardware Modules |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Module Model | Board Part Short Name | Yocto Machine Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
---|
TEM0007-01-S002* | 25_1E0_ES_1GB | tem0007 | REV01 | 1GB | 64MB | ---- | ---- | ---- | TEM0007-01-CHE11-A | 250_1E_1GB | tem0007 | REV01 | 1GB | 64MB | ---- | ---- | ---- |
*used as reference |
Design supports following carriers:
Scroll Title |
---|
anchor | Table_HWC |
---|
title-alignment | center |
---|
title | Hardware Carrier |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
*used as reference |
Additional HW Requirements:
Scroll Title |
---|
anchor | Table_AHW |
---|
title-alignment | center |
---|
title | Additional Hardware |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Additional Hardware | Quantity | Notes |
---|
TE0790 XMOD | 1 | For HSS console | Mini USB cable for JTAG/UART | 2 | Check Carrier Board and Programmer for correct type | RJ45 Ethernet cable | 1 |
| SD card | 1 | 8GB or more | USB Stick | 1 | Optional |
*used as reference |
Content
For general structure and usage of the reference design, see Project Delivery - Microchip devices
Design Sources
Scroll Title |
---|
anchor | Table_DS |
---|
title-alignment | center |
---|
title | Design sources |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Type | Location | Notes |
---|
Libero | <project folder>/libero_source <project folder>/test_board_<Board Part Short Name> | Libero project will be generated by TE Scripts (Optional) Source files for specific assembly variants | SoftConsole | <project folder>/softconsole_source <project folder>/<Board Part Short Name>/SoftConsole
| Additional software will be generated by TE Scripts (Optional) Source files for specific assembly variants
| Yocto | <project folder>/os/yocto | Yocto BSP layer template for linux |
|
Prebuilt
Page properties |
---|
|
Notes : - prebuilt files
- Template Table:
Scroll Title |
---|
anchor | Table_PF |
---|
title-alignment | center |
---|
title | Prebuilt files (only on ZIP with prebult content) |
---|
| Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
File | File-Extension | Description |
---|
Libero Project File | *.prjx |
| FlashPro Express Job | *.job |
| Constraint File | *.pdc |
| Timing Constraint File | *.sdc |
| Components in Block Design | *.cxf |
| Configuration File | *.cfg |
|
|
|
| Software-Application-File | *.elf | Software application for SoftConsole |
|
|
| Device Tree | *.dtb | Device tree blob | CONF-File | *.conf | Boot configuration file (extlinux.conf) | Yocto linux image | *.wic | This File can be flashed via bmaptool on the SD card. | Yocto linux image | *.img | Linux image for SD card |
|
|
Scroll Title |
---|
anchor | Table_PF |
---|
title-alignment | center |
---|
title | Prebuilt files (only on ZIP with prebult content) |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
File | File-Extension | Description |
---|
Libero Project File | *.prjx | Project file | FlashPro Express Job | *.job | Programming file | Constraint File | *.pdc | IO constraint file | Timing Constraint File | *.sdc | Timing constraint file | Components in Block Design | *.cxf | Exported file of polarfire MSS configuration software for importing in Libero | Configuration File | *.cfg | Polarfire MSS configuration file | Software-Application-File | *.hex | Generated hex file by SoftConsole software to program on eNVM memory of Polarfire SoC | Software-Application-File | *.elf | Software application for SoftConsole | Device Tree | *.dtb | Device tree blob | CONF-File | *.conf | Boot configuration file (extlinux.conf) | Yocto linux image | *.wic | This File can be flashed via bmaptool on the SD card. | Yocto linux image | *.img | Linux image for SD card |
|
Download
Reference Design is only usable with the specified Libero version. Do never use different versions of Libero software for the same project.
Reference Design is available on:
Design Flow
Scroll Ignore |
---|
scroll-pdf | true |
---|
scroll-office | true |
---|
scroll-chm | true |
---|
scroll-docbook | true |
---|
scroll-eclipsehelp | true |
---|
scroll-epub | true |
---|
scroll-html | true |
---|
|
|
Note |
---|
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch. |
Trenz Electronic provides a tcl based built environment based on Libero Design Flow.
See also:
The most Trenz Electronic FPGA Reference Designs are TCL-script based projects.
The "normal" Libero project will be generated in the subfolder "/Libero/" and the additional software part will be generated in the subfolder "/software/" after executing scripts.
To create project do the following steps:
- Execute "Generate_TEM0007_Hardware-Design_in_Libero_SoC_v2023.1.cmd"
- Choose one of the following options::
- Press 0 , if the path of installed libero software is : C:/Microchip/Libero_SoC_v2023.1/Designer/bin/libero.exe
- Press 1, if it will be entered the path Microchip or Libero SoC installations folder. The script selects automatically the Libero exe.
- Press 2, if it will be entered the full path to the Libero SoC exe.
- Press 3 to exit the script.
- Select your board in "Board selection" , if there is more than one variant.
- Choose one of the following options for prefered hardware description language:
- Option 0 : VHDL
- Option 1 : VERILOG
- Option 2 : To exit th script
- If the suggested name for the project is acceptable enter y or t or 1. Otherwise enter n or f or 0 and enter the desired name.
- Project will be generated automatically.
- Open the generated project by entering y or t or 1
Scroll Title |
---|
title-alignment | center |
---|
title | Example |
---|
|
|
- After opening Libero project double click on Generate Bitstream menu in Design Flow box to generate the bitstream file.
Expand |
---|
|
|
- After generating bit stream file double click on Configure Design Initialization Data and Memories in Design Flow bow. It will be opened a window.
Expand |
---|
|
|
- Click on eNVM and after that on Add and click on Add Boot Mode 1 Client.
- Enter the path of generated *.hex File by SoftConsole software (HSS) and click on OK.
Expand |
---|
title | HSS generated *.hex File attachment |
---|
|
|
- Save the project and double click on Generate Bitstream again.
Expand |
---|
title | Generate Bitstream again |
---|
|
|
- Double click on Flashpro Express to generate *.job File
Expand |
---|
|
|
Launch
Page properties |
---|
|
Note: - Programming and Startup procedure
|
Programming
Note |
---|
Check Module and Carrier TRMs for proper HW configuration before you try any design. |
Programming eNVM
The eNVM is a user non-volatile flash memory that can be programmed independently. There is two methods to program eNVM:
Programming eNVM in SoftConsole
To program HSS *.elf file on FPGA:
- Connect the modified TE0703 board via its Mini-USB connector. (J4)
- Open SoftConsole software as administrator, if it is not done yet.
- Select correct directory as workspace directory.
- Build the hart-software-services-master , if it is not done yet.
- Click on Run > External Tools > Polarfire SoC program non-secure boot-mode 1
Programming eNVM in Flashpro Express
The HSS generated hex file can be attached to bitstream file. For more information see TEM0007 Test Board #Design Flow
To program the eNVM in Flashpro Express see #Using FlashPro Express
Programming Bitstream
There is two ways to program bitstream file on FPGA:
Using Libero SoC
- Connect the TEM0703 board via its Mini-USB connector. (J4)
- After generating bitstream in Libero click on Run PROGRAM Action to program bitstream file on FPGA.
Expand |
---|
title | Programming FPGA using Libero SoC |
---|
|
|
Using FPExpress software
- Connect the board via USB connector
- Export *.job file , if does not exist yet.
Expand |
---|
title | Job File Exporting using Libero SoC |
---|
|
|
Expand |
---|
title | Open FPExpress software |
---|
|
|
- Click on new
- Give path of job file by clicking on Browse
- Click on OK
- Click on RUN
Get prebuilt boot binaries
Note |
---|
Reference Design is also available with prebuilt files. It's recommended to use TE prebuilt files for first launch. |
Run create_project_win.cmd/create_project_linux.shSelect Module in 'Board selection'Click on 'Export prebuilt files' buttonFolder <project folder>/_binaries_<Article Name> with subfolder boot_linux will be generated and opened
SD-Boot mode
This module supports SD card boot mode. There is no dip switch to select boot mode. The selection between SD card or other boot mode will be done in HSS. TEM0007 module supports SD card boot mode and JTAG boot mode.
Prepare SD card as follows for SD -Boot.There card boot mode:
- Extract SD_Card.zip file
- Now there is a image file (SD_Card.img)
- Alternative SD card can be written via Win32DiskImager or balenaEtcher softwares in Windows OS.
- In the case of writing image file in linux there are two commands to write image file on the SD card after mounting SD card in the host linux same as WSL:
- Insert SD card in the SD card reader
Expand |
---|
|
Code Block |
---|
theme | Midnight |
---|
linenumbers | true |
---|
| bmaptool copy --nobmap <Path of image file *.img> /dev/sdX |
|
- After mounting the SD card in linux the name of SD card recognized via lsblk command. For example SD card name can be sda or sdb.
Expand |
---|
|
Code Block |
---|
theme | Midnight |
---|
linenumbers | true |
---|
| dd if=<Path of image file *.img> of=/dev/sdX |
|
- After mounting the SD card in linux the name of SD card recognized via lsblk command. For example SD card name can be sda or sdb.
Alternative SD card can be written via Win32DiskImager or balenaEtcher softwares in Windows OS- .
JTAG
Not used on this example.
Usage
- Prepare HW like described on section Programming
- Connect UART USB (most cases same as JTAG)
- Connect your board to the network
- Power on PCB
UART
- Open Serial Console (e.g. PuTTY)
select COM Port
Info |
---|
Win OS: see device manager Linux OS: see dmesg | grep tty (UART is *USB1) |
- Speed: 115200
- Press reset button
- Console output depends on used Software project, see Software Design - SDK#Application
- Linux Console:
Login data:
Info |
---|
Note: Wait until Linux boot finished |
Code Block |
---|
theme | Midnight |
---|
linenumbers | true |
---|
|
tem0007 login: root
|
You can use Linux shell now.
Code Block |
---|
theme | Midnight |
---|
linenumbers | true |
---|
|
i2cdetect -y -r 1 (check I2C 1 Bus)
dmesg | grep rtc (RTC check)
udhcpc (ETH0 check)
lsusb (USB check) |
- ...
System Design - Libero
Block Design
The block designs may differ depending on the assembly variant.
Scroll Title |
---|
title-alignment | center |
---|
title | Block Design |
---|
|
|
HPS Interfaces
Activated interfaces:
Type | Note |
DDR | -- |
EMAC0 | -- |
EMAC1 | -- |
GPIO0 | -- |
GPIO1 | -- |
GPIO2 | -- |
I2C0 | -- |
I2C1 | -- |
QSPI | -- |
SDMMC | -- |
UART0 | -- |
UART1 | -- |
USB0 | -- |
USB1 | -- |
CAN0 | -- |
CAN1 | -- |
Software Design - SoftConsole
Application
Page properties |
---|
|
---------------------------------------------------------- General Example: hello_tei0006Hello TEI0006 is a Hello World example as endless loop instead of one console output. |
Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/
...
HSS (Hart Software Service)
This is Hart Software Services (HSS) code.On PolarFire SoC, this is comprised of two portions:
A superloop monitor running on the E51 minion processor, which receives requests from the individual U54 application processors to perform certain services on their behalf;
A Machine-Mode software interrupt trap handler, which allows the E51 to send messages to the U54s, and request them to perform certain functions for it related to rebooting a U54.
The HSS performs boot and system monitoring functions for PolarFire SoC. The HSS is compressed (DEFLATE) and stored in eNVM. On power-up, a small decompressor wrapper inflates the HSS from eNVM flash to L2-Scratchpad memory and starts the HSS.
Creating HSS workspace in SoftConsole
- Download the HSS folder here: hart-software-services
- Unzip the hart-software-services-master zip file in the SoftConsole workspace
- Open SoftConsole software as administrator
- Select correct directory as workspace directory. The workspace folder must consist of hart-software-services-master folder
- Right click on board folder in the left side and click on new folder
- Rename the folder for desired board. For example for TEM0007 module rename it to TEM0007. If there is TEM0007, this HSS workspace was created already and HSS is ready to be compiled.
- Create other subfolders as shown (For example for TEM0007):
Expand |
---|
title | HSS Structure Example |
---|
|
|
- hart-software-serevices-master
- board
- TEM0007
- drivers_config
- fpga_ip
- miv_ihc
- Copy miv_ihc_add_mapping.h and miv_ihc_config.h files from original folder of icicle kit board ( mpfs-icicle-kit-es ) and paste in this folder.
- fpga_design_config
- This folder should be left empty. After compiling the neccessary header files for ddr, clock, IOs and other properties of desired module and hardware design will be generated and saved in this folder by mpfs_configuration_generator.py python script. The python script is saved already in the tools/polarfire-soc-configuration-generator folder.
- mpfs_hal_config
- Copy mss_sw_config.h file from original folder of icicle kit board ( mpfs-icicle-kit-es ) and paste
- soc_fpga_design
- xml
- Copy the generated xml with PolarFireSoC MSS Configurator software here. For example TEM0007_MSS_mss_cfg.xml
- Copy the following files from original folder of icicle kit board ( mpfs-icicle-kit-es ) and paste in this folder (TEM0007 folder) :
- hss_board_init.c
- hss_usrt_init.c
- usrt_helper.c
- hss_I2Scratch.lds
- Kconfig
- Edit Kconfig for example for TEM0007 module as shown:
Expand |
---|
|
Code Block |
---|
| menu "TEM0007 Design Configuration Options"
config SOC_FPGA_DESIGN_XML
string "Enter path to Libero XML file"
default "boards/$(BOARD)/soc_fpga_design/xml/TEM0007_MSS_mss_cfg.xml"
help
This option specifies the design XML file to use.
endmenu
|
|
- Makefile
- Edit Makefile for example for TEM0007 module as shown:
Expand |
---|
title | Makefile of TEM0007 folder |
---|
|
Scroll Title |
---|
title-alignment | center |
---|
title | Makefile of TEM0007 folder |
---|
|
|
|
- Edit Makefile in hart-software-services-master Folder for example for TEM0007 as shown:
Expand |
---|
title | Makefile of hart-software-services-master |
---|
|
Scroll Title |
---|
title-alignment | center |
---|
title | Makefile of hart-software-services-master folder |
---|
|
|
|
- Copy def_config file from original folder of icicle kit board ( mpfs-icicle-kit-es ) and paste it in hart-software-services-master folder and rename it to .config file.
- Edit .config file according to your module. For example for TEM0007 is edited this file as shown:
Expand |
---|
|
Scroll Title |
---|
title-alignment | center |
---|
title | .config File |
---|
|
|
|
- Now HSS workspace is ready to be compiled. Right click on hart-software-services-master and click on Build Project.
- After compiling a config.h will be generated in the hart-software-services-master folder. By opening this header file it can be seen all configurations of .config file.
Software Design - Yocto
Trenz electronic has developed his own BSP for Microchip devices same as polarfire soc in Yocto. In the following will be explained the folders in detail.
meta-trenz-polarfire-bsp Folder | Description |
---|
recipes-apps | Contains of start up application for executing of init.sh by booting. |
---|
recipes-bsp | Contains of uboot necessary files same as *.bbappend files, device tree and etc. |
---|
recipes-core | Contains of *.bb file for Trenz defined image version. In this file are defined necessary packets or files that must be installed in linux. |
---|
recipes-kernel | Contains of kernel necessary files same as *.bbappend files, device tree, config files and etc. |
---|
recipes-tools | Contains of *.bbappend file |
---|
tools | Contains of manifest xml file to define necessary meta data that are required. |
---|
In the following table exists more information about required packets and supported version.
Meta data | Supported Version | Description |
---|
meta-riscv | Kirkstone |
|
---|
openembedded-core | Kirkstone |
|
---|
meta-openembedded | Kirkstone |
|
---|
meta-polarfire-soc-yocto-bsp | 2022.11 |
|
---|
Trenz BSP contains of a shell script. If this shell script in be executed , all required processes for making a linux image file will be executed. The user needs only to write the image file on the SD card. To prepare the image file :
- Download and save meta-trenz-polarefile-bsp folder in the host linux
Expand |
---|
title | In meta-trenz-polarfire-bsp execute shell script via the following command: |
---|
|
Code Block |
---|
theme | Midnight |
---|
linenumbers | true |
---|
| . ./meta-trenz-polarfire-bsp/trenz_polarfire_setup.sh |
|
Expand |
---|
title | Enter the machine name. Here the machine is equal to module name , but with lower case letters. For example for TEM0007 module enter : tem0007 |
---|
|
|
Expand |
---|
title | Enter the image type. It depends on the user application and required installed packages in linux. As default the user can enter: te-image-minimal |
---|
|
|
- After compiling image file *.img and its converted zip file *.zip will be in trenz bsp folder saved :
- <trenz bsp folder>/prebuilt/boot/yocto/SD_Card.img
- <trenz bsp folder>/prebuilt/boot/yocto/SD_Card.zip
For Yocto installation and project creation, follow instructions from:
U-Boot
Start with Create a custom BSP layer for Microchip SoC or FPGA#Configure u-boot
File location: meta-<module>/recipes-bsp/u-boot/
Changes:
Device Tree
U-boot Device Tree
Code Block |
---|
language | js |
---|
title | tem0007.dtsi |
---|
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2020 Microchip Technology Inc.
* Padmarao Begari <padmarao.begari@microchip.com>
*/
/ {
aliases {
cpu1 = &cpu1;
cpu2 = &cpu2;
cpu3 = &cpu3;
cpu4 = &cpu4;
};
}; |
Code Block |
---|
|
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2021 Microchip Technology Inc.
* Padmarao Begari <padmarao.begari@microchip.com>
*/
/dts-v1/;
#include "microchip-mpfs.dtsi"
#include "dt-bindings/gpio/gpio.h"
/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ 1000000
/ {
model = "Microchip PolarFire-SoC Icicle Kit";
compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
aliases {
serial1 = &uart1;
ethernet0 = &mac0;
spi0 = &qspi;
};
chosen {
stdout-path = "serial1";
};
cpus {
timebase-frequency = <RTCCLK_FREQ>;
};
ddrc_cache: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
clocks = <&clkcfg CLK_DDRC>;
status = "okay";
};
usb_phy: usb_phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
reset-names = "OTG_RST";
};
};
&uart1 {
status = "okay";
};
&mmc {
status = "okay";
bus-width = <4>;
disable-wp;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-debounce-delay-ms;
card-detect-delay = <200>;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
};
&i2c1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
eeprom: eeprom@50 {
compatible = "microchip,24aa025", "atmel,24c02";
//compatible = "atmel,24c02";
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
eth0_addr: eth-mac-addr@FA {
reg = <0xFA 0x06>;
};
};
};
&refclk {
clock-frequency = <125000000>;
};
&mac1 {
status = "disabled";
};
&mac0 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <ð0_addr>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy0>;
phy0: ethernet-phy@1 {
device-type = "ethernet-phy";
reg = <1>;
reset-names = "ETH_RST";
reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
};
&qspi {
status = "okay";
num-cs = <1>;
flash0: spi-nor@0 {
compatible = "spi-nor";
reg = <0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <20000000>;
spi-cpol;
spi-cpha;
};
};
&usb {
status = "okay";
dr_mode = "otg";
// dr_mode = "host";
phys = <&usb_phy>;
};
|
Kernel Device Tree
Code Block |
---|
language | js |
---|
title | tem0007.dts |
---|
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */
/dts-v1/;
#include "mpfs.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/* Clock frequency (in Hz) of the rtcclk */
#define MTIMER_FREQ 1000000
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Trenz TEM0007";
compatible = "trenz,tem0007","microchip,mpfs";
aliases {
ethernet0 = &mac0;
serial0 = &mmuart0;
serial1 = &mmuart1;
serial2 = &mmuart2;
serial3 = &mmuart3;
serial4 = &mmuart4;
};
chosen {
stdout-path = "serial1:115200n8";
};
cpus {
timebase-frequency = <MTIMER_FREQ>;
};
//******************************************************//
ddrc_cache: memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
fabricbuf0ddrc: buffer@A0000000 {
compatible = "shared-dma-pool";
reg = <0x0 0xA0000000 0x0 0x2000000>;
no-map;
};
};
udmabuf0 {
compatible = "ikwzm,u-dma-buf";
device-name = "udmabuf-ddr-c0";
minor-number = <0>;
size = <0x0 0x2000000>;
memory-region = <&fabricbuf0ddrc>;
sync-mode = <3>;
};
//******************************************************//
usb_phy: usb_phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
reset-names = "OTG_RST";
};
soc {
dma-ranges = <0 0 0 0 0x40 0>;
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>;
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
eeprom: eeprom@50 {
compatible = "microchip,24aa025", "atmel,24c02";
//compatible = "atmel,24c02";
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
eth0_addr: eth-mac-addr@FA {
reg = <0xFA 0x06>;
};
};
};
&mac0 {
status = "okay";
phy-mode = "sgmii";
nvmem-cells = <ð0_addr>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy0>;
phy0: ethernet-phy@1 {
device-type = "ethernet-phy";
reg = <1>;
reset-names = "ETH_RST";
reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
};
&mbox {
status = "okay";
};
&mmc {
status = "okay";
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-mmc-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
};
&mmuart1 {
status = "okay";
};
&mmuart2 {
status = "okay";
};
&mmuart3 {
status = "okay";
};
&mmuart4 {
status = "okay";
};
&qspi {
status = "okay";
num-cs = <1>;
};
&refclk {
clock-frequency = <125000000>;
};
&spi0 {
status = "okay";
};
&usb {
status = "okay";
dr_mode = "otg";
// dr_mode = "host";
phys = <&usb_phy>;
};
&syscontroller {
status = "okay";
};
|
Kernel
Start withCreate a custom BSP layer for Intel SoC or FPGA#Configure linux kernel
File location: meta-<module>/recipes-kernel/linux/
Changes:
Images
Image recipe for minimal console image
File location: meta-<module>/recipes-images/yocto/
Image recipes:
- te-image-minimal.bb: create minimal linux image
- te-initramfs.bb: required for building an image with initial RAM Filesystem
Added packages/recipes:
Rootfs
Used filesystem: Initial RAM Filesystem (initramfs)
Appx. A: Change History and Legal Notices
Scroll Ignore |
---|
scroll-pdf | true |
---|
scroll-office | true |
---|
scroll-chm | true |
---|
scroll-docbook | true |
---|
scroll-eclipsehelp | true |
---|
scroll-epub | true |
---|
scroll-html | true |
---|
|
|
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
Page properties |
---|
|
- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
|
Scroll Title |
---|
anchor | Table_dch |
---|
title-alignment | center |
---|
title | Document change history |
---|
|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
style | |
---|
widths | 2*,*,3*,4* |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Date | Document Revision | Authors | Description |
---|
Page info |
---|
| modified-date |
---|
| modified-date |
---|
dateFormat | yyyy-MM-dd |
---|
|
| Page info |
---|
infoType | Current version |
---|
dateFormat | yyyy-MM-dd |
---|
prefix | v. |
---|
type | Flat |
---|
|
| Page info |
---|
infoType | Modified by |
---|
type | Flat |
---|
|
| | -- | all | Page info |
---|
infoType | Modified users |
---|
dateFormat | yyyy-MM-dd |
---|
type | Flat |
---|
|
| -- |
|
Legal Notices
Include Page |
---|
| IN:Legal Notices |
---|
| IN:Legal Notices |
---|
|