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Design Name is always "TE Series Name" + Design name, for example "TE0720 Projektname"

This  history table is only for template style documentation which describes changes on style

DateVersionChangesAuthor
2022-03-071.1
  • update include links
jh
2022-01-251.0
  • Initial release
jh





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Overview

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This tutorial guides you from inital test_board reference design for TE0820 SoM to custom extensible vitis platfom and then shows how to implement and run basic VADD example, Vitis-AI 3.0 test_dpu_trd example (ResNet50) and vehicleclassification on DPU with video input from USB camera.

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Notes :

  • short overview description of the tutorial

Key Features

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Notes :

  • Add basic key features, of this tutorial,


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Excerpt
  • AMD Vitis 2022.2
  • Vitis AI 3.0
  • Vitis custom extensible platform
  • PetaLinux 2022.2 extension with AI 3.0 for Vitis  
  • Vector addition
  • ResNet50 on DPU
  • Vehicleclassification on DPU with video input from USB camera

Requirements

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TypeNameVersionNote
HWTE0820 Module----
HWTEBF0808 Carrier----
Diverse CableUSB, Power...----
Virtual MaschineOracle, VMWare or MS WSL--optional
OSLinuxXilinx Supported OS running on VM or native
Reference DesignTE0820-test_board-vivado_2022.2-build_2_*.zipbuild 2 or higher to match Vivado 2022.2Tutorial was created and tested with:
SWVitis2022.2--
SWVivado2022.2
SWPetalinux2022.2--
SWPutty----
Repo

Vitis-AI

3.0

GitHub - Xilinx/Vitis-AI at 3.0

https://xilinx.github.io/Vitis-AI/3.0/html/index.html



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General Chapter Vitis AI Prepare Development Environment 2022.2 is included

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PD:Vitis AI Prepare Development Environment 2022.2
PD:Vitis AI Prepare Development Environment 2022.2
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end of chapter "Prepare Development Environment2

Prepare Reference Design for Extensible Custom Platform

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Update Vivado Project for Extensible Platform

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Note

Trenz Electronic Scripts allows posibility change some setup via enviroment variables, which depends on the used OS and PC performace.

To improve performance on multicore CPU add global envirment on line 64:
export TE_RUNNING_JOBS=10

to  /etc/bash.bashrc or local to design_basic_settings.sh

For othervariables see also:

Project Delivery - Xilinx devices#EnvironmentVariables

In Ubuntu terminal, source paths to Vitis and Vivado tools by

Code Block
languagebash
$ source /tools/Xilinx/Vitis/2022.2/settings64.sh

Download TE0820 test_board Linux Design file(see Reference Design download link on chapter TE0820 Evaluation Board Vitis AI 3.0 Tutorial) with pre-build files to

 ~/Downloads/TE0820-test_board-vivado_2022.2-build_2_20230622121437.zip

This TE0820 test_board ZIP file contains bring-up scripts for creation of Petalinux for range of modules in zipped directory named “test_board”.

Unzip the file to directory:
~/work/te0820_84_240

Note
All supported modules are identified in file: ~/work/te0820_84_240/test_board/board_files/TE0820_board_files.csv

We will select module 84 with name TE0820-05-4DE21MA, with device xczu04ev-sfvc784-1-e on TE0706 carrier board. We will use default clock 240 MHz.
That is why we name the package te0820_84_240 and proposed to unzip the TE0820 test_board Linux Design files into the directory:
~/work/te0820_84_240

In Ubuntu terminal, change directory to the test_board directory:

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languagebash
$ cd ~/work/te0820_84_240/test_board

Setup the test_board directory files for a Linux host machine.
In Ubuntu terminal, execute:

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$ chmod ugo+rwx ./console/base_sh/*.sh
$ chmod ugo+rwx ./_create_linux_setup.sh
$ ./_create_linux_setup.sh

Select option (0) to open Selection Guide and press Enter

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Select variant 24 from the selection guide, press enter and agree selection

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Create Vivado Project with option 1

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Vivado Project will be generated for the selected variant.

Note

Selection Guide automatically modified ./design_basic_settings.sh with correct variant, so other provided bash files to recreate or open Vivado project again can be used later also.

In case of using selection guide, variant can be selected also manually:

Expand
titleClick here to see how you set variant manually

Select option (2) to create maximum setup of CMD-Files and exit the script (by typing any key).

It moves main design bash scripts to the top of the test_board directory. Set these files as executable, from the Ubuntu terminal:

Code Block
languagebash
$ chmod ugo+rwx *.sh

In text editor, open file
~/work/te0820_84_240/test_board/design_basic_settings.sh

On line 63, change
export PARTNUMBER=LAST_ID
to
export PARTNUMBER=84

Note
To improve performance on multicore CPU add on line 64:
export TE_RUNNING_JOBS=10

Vivado will be utilizing up to 10 parallel logical processor cores with this setup
instead of the default of 2 parallel logical processor cores.

Save the modified file.

This modification will guide the Trenz TE0820 test_board Linux Design scripts to generate Vivado HW for the module 84 with name TE0820-05-4DE21MA, with device xczu04ev-sfvc784-1-e on TEBF0706 carrier board.

In Ubuntu terminal, change directory to
~/work/te0820_84_240/test_board

The Vivado tool will be opened and Trenz Electronic HW project for the TE0820 test_board Linux Design, part 84 will be generated  by running this script:

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$ ./vivado_create_project_guimode.sh



The Vivado tool will be opened and Trenz Electronic HW project for the TE0820 test_board Linux Design, part 84 will be generated.

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In Vivado window Sources, click on zusys_wrapper and next on zusys.bd to open the HW diagram in IP integrator:

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It is possible to display diagram in separate window by clicking on float icon in upper right corner of the diagram.

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Zynq Ultrascale+ block is configured for the Trenz TE0820 test_board Linux Design on the TE0706 carrier board.

This is starting point for the standard PetaLinux system supported by Trenz with steps for generation of the PetaLinux system. Parameters of this system and compilation steps are described on Trenz Wiki page:

TE0820 Test Board - Public Docs - Trenz Electronic Wiki (trenz-electronic.de)

Follow steps described in these wiki page if you would like to create fixed, not extensible Vitis platform.

The Extensible Vitis platform generation steps are described in next paragraphs.

Create Extensible Vitis platform

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To implement hardware this tutorial offers two alternatives: Fast Track or Manual Track:

Fast Track

Block Design of the Vivado project must be opened for this step. Copy following TCL Code to the TCL comand console of Vivado:

Code Block
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titleTCL Script to prepare Extensible Vitits Platform
collapsetrue
#activate extensible platform
set_property platform.extensible true [current_project]
save_bd_design
 
set_property PFM_NAME [string map {part0 zusys} [string map {trenz.biz trenz} [current_board_part]]] [get_files zusys.bd]
set_property platform.design_intent.embedded {true} [current_project]
set_property platform.design_intent.datacenter {false} [current_project]
set_property platform.design_intent.server_managed {false} [current_project]
set_property platform.design_intent.external_host {false} [current_project]
set_property platform.default_output_type {sd_card} [current_project]
set_property platform.uses_pr {false} [current_project]
save_bd_design
 
startgroup
create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0
endgroup

set_property -dict [list \
  CONFIG.CLKOUT2_JITTER {102.086} \
  CONFIG.CLKOUT2_PHASE_ERROR {87.180} \
  CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {200.000} \
  CONFIG.CLKOUT2_USED {true} \
  CONFIG.CLKOUT3_JITTER {90.074} \
  CONFIG.CLKOUT3_PHASE_ERROR {87.180} \
  CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {400.000} \
  CONFIG.CLKOUT3_USED {true} \
  CONFIG.CLKOUT4_JITTER {98.767} \
  CONFIG.CLKOUT4_PHASE_ERROR {87.180} \
  CONFIG.CLKOUT4_REQUESTED_OUT_FREQ {240.000} \
  CONFIG.CLKOUT4_USED {true} \
  CONFIG.MMCM_CLKOUT1_DIVIDE {6} \
  CONFIG.MMCM_CLKOUT2_DIVIDE {3} \
  CONFIG.MMCM_CLKOUT3_DIVIDE {5} \
  CONFIG.NUM_OUT_CLKS {4} \
  CONFIG.RESET_PORT {resetn} \
  CONFIG.RESET_TYPE {ACTIVE_LOW} \
] [get_bd_cells clk_wiz_0]
connect_bd_net [get_bd_pins clk_wiz_0/resetn] [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0]
connect_bd_net [get_bd_pins clk_wiz_0/clk_in1] [get_bd_pins zynq_ultra_ps_e_0/pl_clk0]

startgroup
create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_1
endgroup

set_property location {3 1192 -667} [get_bd_cells proc_sys_reset_1]
copy_bd_objs /  [get_bd_cells {proc_sys_reset_1}]
set_property location {3 1190 -487} [get_bd_cells proc_sys_reset_2]
copy_bd_objs /  [get_bd_cells {proc_sys_reset_2}]
set_property location {3 1126 -309} [get_bd_cells proc_sys_reset_3]
copy_bd_objs /  [get_bd_cells {proc_sys_reset_3}]
set_property location {3 1148 -136} [get_bd_cells proc_sys_reset_4]
connect_bd_net [get_bd_pins proc_sys_reset_1/slowest_sync_clk] [get_bd_pins clk_wiz_0/clk_out1]
connect_bd_net [get_bd_pins proc_sys_reset_2/slowest_sync_clk] [get_bd_pins clk_wiz_0/clk_out2]
connect_bd_net [get_bd_pins proc_sys_reset_3/slowest_sync_clk] [get_bd_pins clk_wiz_0/clk_out3]
connect_bd_net [get_bd_pins proc_sys_reset_4/slowest_sync_clk] [get_bd_pins clk_wiz_0/clk_out4]

startgroup
connect_bd_net [get_bd_pins proc_sys_reset_4/ext_reset_in] [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0]
connect_bd_net [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0] [get_bd_pins proc_sys_reset_3/ext_reset_in]
connect_bd_net [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0] [get_bd_pins proc_sys_reset_2/ext_reset_in]
connect_bd_net [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0] [get_bd_pins proc_sys_reset_1/ext_reset_in]
endgroup

startgroup
connect_bd_net [get_bd_pins proc_sys_reset_4/dcm_locked] [get_bd_pins clk_wiz_0/locked]
connect_bd_net [get_bd_pins clk_wiz_0/locked] [get_bd_pins proc_sys_reset_2/dcm_locked]
connect_bd_net [get_bd_pins clk_wiz_0/locked] [get_bd_pins proc_sys_reset_1/dcm_locked]
connect_bd_net [get_bd_pins clk_wiz_0/locked] [get_bd_pins proc_sys_reset_3/dcm_locked]
endgroup

set_property PFM.CLOCK {clk_out1 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "4" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "4" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "5" is_default "false" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
set_property pfm_name zusys [get_files {zusys.bd}]
set_property PFM.CLOCK {clk_out1 {id "1" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "4" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "5" is_default "false" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "1" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "4" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "5" is_default "false" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "1" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "5" is_default "false" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "1" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "4" is_default "false" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
set_property PFM.CLOCK {clk_out1 {id "1" is_default "false" proc_sys_reset "/proc_sys_reset_1" status "fixed" freq_hz "100000000"} clk_out2 {id "2" is_default "false" proc_sys_reset "/proc_sys_reset_2" status "fixed" freq_hz "200000000"} clk_out3 {id "3" is_default "false" proc_sys_reset "/proc_sys_reset_3" status "fixed" freq_hz "400000000"} clk_out4 {id "4" is_default "true" proc_sys_reset "/proc_sys_reset_4" status "fixed" freq_hz "240000000"}} [get_bd_cells /clk_wiz_0]
save_bd_design

startgroup
set_property -dict [list \
  CONFIG.PSU__USE__IRQ0 {1} \
  CONFIG.PSU__USE__M_AXI_GP0 {1} \
] [get_bd_cells zynq_ultra_ps_e_0]
endgroup

connect_bd_net [get_bd_pins zynq_ultra_ps_e_0/maxihpm0_fpd_aclk] [get_bd_pins clk_wiz_0/clk_out4]

startgroup
create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc_0
endgroup

set_property CONFIG.C_IRQ_CONNECTION {1} [get_bd_cells axi_intc_0]
connect_bd_net [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out4]
connect_bd_net [get_bd_pins axi_intc_0/s_axi_aresetn] [get_bd_pins proc_sys_reset_4/peripheral_aresetn]
connect_bd_net [get_bd_pins axi_intc_0/irq] [get_bd_pins zynq_ultra_ps_e_0/pl_ps_irq0]

startgroup
set_property CONFIG.PSU__MAXIGP0__DATA_WIDTH {32} [get_bd_cells zynq_ultra_ps_e_0]
endgroup

startgroup
apply_bd_automation -rule xilinx.com:bd_rule:axi4 -config { Clk_master {/clk_wiz_0/clk_out4 (240 MHz)} Clk_slave {/clk_wiz_0/clk_out4 (240 MHz)} Clk_xbar {/clk_wiz_0/clk_out4 (240 MHz)} Master {/zynq_ultra_ps_e_0/M_AXI_HPM0_FPD} Slave {/axi_intc_0/s_axi} ddr_seg {Auto} intc_ip {New AXI Interconnect} master_apm {0}}  [get_bd_intf_pins axi_intc_0/s_axi]
endgroup

disconnect_bd_net /proc_sys_reset_4_peripheral_aresetn [get_bd_pins ps8_0_axi_periph/S00_ARESETN]
disconnect_bd_net /proc_sys_reset_4_peripheral_aresetn [get_bd_pins ps8_0_axi_periph/M00_ARESETN]

startgroup
connect_bd_net [get_bd_pins ps8_0_axi_periph/S00_ARESETN] [get_bd_pins proc_sys_reset_4/interconnect_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_4/interconnect_aresetn] [get_bd_pins ps8_0_axi_periph/M00_ARESETN]
endgroup

set_property name ps8_0_axi_interconnect_1 [get_bd_cells ps8_0_axi_periph]
set_property name axi_interconnect_1 [get_bd_cells ps8_0_axi_interconnect_1]
set_property PFM.IRQ {intr { id 0 range 32 }} [get_bd_cells /axi_intc_0]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M03_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M03_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M04_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M03_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M04_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M05_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M03_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M04_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M05_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M06_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M01_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M02_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M03_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M04_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M05_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M06_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"} M07_AXI {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /axi_interconnect_1]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HPC" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "HP0" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "HP0" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "HP1" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "HP0" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "HP1" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "HP2" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]
set_property PFM.AXI_PORT {M_AXI_HPM1_FPD {memport "M_AXI_GP" sptag "" memory "" is_range "false"} S_AXI_HPC0_FPD {memport "S_AXI_HP" sptag "HPC0" memory "" is_range "false"} S_AXI_HPC1_FPD {memport "S_AXI_HP" sptag "HPC1" memory "" is_range "false"} S_AXI_HP0_FPD {memport "S_AXI_HP" sptag "HP0" memory "" is_range "false"} S_AXI_HP1_FPD {memport "S_AXI_HP" sptag "HP1" memory "" is_range "false"} S_AXI_HP2_FPD {memport "S_AXI_HP" sptag "HP2" memory "" is_range "false"} S_AXI_HP3_FPD {memport "S_AXI_HP" sptag "HP3" memory "" is_range "false"}} [get_bd_cells /zynq_ultra_ps_e_0]

save_bd_design

# add addresses to unmapped peripherals
assign_bd_address
 
#save
save_bd_design
 
#save project XPR name
global proj_xpr
set proj_xpr [current_project]
append proj_xpr .xpr
 
#close project
close_project
 
# reopen project
open_project $proj_xpr
 
# open block design
open_bd_design [current_project].srcs/sources_1/bd/zusys/zusys.bd
 
#validate
#validate_bd_design

This script modifies the Initial platform Block design into the Extensible platform Block design and also defines define Platform Setup configuration.

In Vivado, open the design explorer and Platform description.
The fast track result is identical to the manually performed modifications described in next sections. In Vivado, save block design by clicking on icon “Save Block Design”.

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Continue the design path with Validate Design.

Manual Track

In Vivado project, click in Flow Navigator on Settings. In opened Settings window, select General in Project Settings, select Project is an extensible Vitis platform. Click on OK.

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IP Integrator of project set up as an extensible Vitis platform has an additional Platform Setup window.

Add multiple clocks and processor system reset IPs
In IP Integrator Diagram Window, right click, select Add IP and add Clocking Wizard IP clk_wiz_0. Double-click on the IP to Re-customize IP window.  Select Output Clocks panel. Select four clocks with frequency 100, 200, 400 and 240 MHz.
100 MHz clock will serve as low speed clock.
200 MHz and 400 MHz clock will serve as clock for possible AI engine.
240 MHz clock will serve as the default extensible platform clock. By default, Vitis will compile HW IPs with this default clock. 

Set reset type from the default Active High to Active Low. 

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Clik on OK to close the Re-customize IP window.

Connect input resetn of clk_wiz_0 with output pl_resetn0 of zynq_ultra_ps_e_0.
Connect input clk_in1 of clk_wiz_0 with output pl_clk0 of zynq_ultra_ps_e_0.

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Add and connect four Processor System Reset blocks for each generated clock.

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Open Platform Setup window of IP Integrator to define Clocks. In Settings, select Clock.

In “Enabled” column select all four defined clocks clk_out1, clk_out2, clk_out3, clk_out4 of clk_wiz_0 block.

In “ID” column keep the default Clock ID: 1, 2, 3, 4

In “Is Default” column, select clk_out4 (with ID=4) as the default clock.  One and only one clock must be selected as default clock.

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Disconnect input pin maxihpm0_lpd_aclk of zynq_ultra_ps_e_0 from the 100 MHz clock net. This net is driven by clock output pl_clk0 of zynq_ultra_ps_e_0.

Connect input pin maxihpm0_lpd_aclk of zynq_ultra_ps_e_0 to the 240 MHz clk_out4 of clk_wiz_0 IP block.

These two modifications are made to support the axi-lite interface of an interrupt controller operating at 240 MHz clock, identical with the default extendable platform clock.

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Add, customize and connect the AXI Interrupt Controller
Add AXI Interrupt Controller IP axi_intc_0.
Double-click on axi_intc_0 to re-customize it.

In “Processor Interrupt Type and Connection” section select the “Interrupt Output Connection” from “Bus” to “Single”.

In “Peripherial Interrupt Type” section, change the “Interrupts Types Edge or Level” from AUTO to MANUAL.  Change the corresponding value from 0xFFFFFFFF to 0x00000000.

Click on OK to accept these changes.

Note
This re-configuration is manually setting all interrupts as level interrupts. With this setting, the PetaLinux automatically creates correct description of the interrupt controller in the device tree.
The Vitis extensible flow generates HW IP blocks with level interrupts.


Note
In case of user defined edge interrupts, the corresponding interrupt description will be added in an customised, interrupt controller description section of the user-defined device tree file
~/work/te0820_84_240/test_board/os/petalinux/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi
For the default extensible TE0820_24_20_pfm platform it is not needed.


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Connect interrupt controller clock input s_axi_aclk of axi_intc_0 to clock output dlk_out4 of clk_wiz_0. It is the default, 240 MHz clock of the extensible platform.

Connect interrupt controller input s_axi_aresetn of axi_intc_0 to output peripheral_aresetn[0:0] of proc_sys_reset_4 . It is the reset block for default, 240 MHz clock of the extensible platform.

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Use the Run Connection Automation wizard to connect the axi lite interface of interrupt controller axi_intc_0 to zynq_ultra_ps_e_0. It is available in green line in top of the Diagram window.

In Run Connection Automaton window, click OK.

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New AXI interconnect ps_8_axi_periph is created and related connections are generated.

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Vitis extensible design flow will be expanding the AXI interconnect ps_8_axi_periph for interfacing and configuration of registers of generated HW IP blocks with the default extensible platform clock 240 MHz.

Double-click on zynq_ultra_ps_e_0 to re-customize it by enabling of an interrupt input pl_ps_irq0[0:0]. Click OK.


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Modify the automatically generated reset network of AXI interconnect ps_8_axi_periph IP.

Disconnect input S00_ARESETN of ps_8_axi_periph from the network driven by output peripherial_aresetn[0:0] of proc_sys_reset_4 block.

Connect input S00_ARESETN of ps_8_axi_periph block with output interconnect_aresetn[0:0] of proc_sys_reset_4 block.

Disconnect input M00_ARESETN of ps_8_axi_periph block from the network driven by output peripherial_aresetn[0:0] of proc_sys_reset_4 block.

Connect input M00_ARESETN of ps_8_axi_periph to output interconnect_aresetn[0:0] of proc_sys_reset_4 block.

This modification will make the reset structure of the AXI interconnect ps_8_axi_periph block identical to the future extensions generated by the Vitis extensible design flow.

Connect the interrupt input pl_ps_irq0[0:0] of zynq_ultra_ps_e_0 block with output irq of axi_intc_0 block.

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Rename ps8_0_axi_periph to: axi_interconnect_1 

In Platform Setup, select “Interrupt” and enable intr in the “Enabled” column.

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In Platform Setup, select AXI Port for zynq_ultra_ps_e_0:

Select M_AXI_HPM0_FPD and M_AXI_HPM1_FPD in column “Enabled”.

Select S_AXI_HPC0_FPD and S_AXI_HPC1_FPD in column “Enabled”.

For S_AXI_HPC0_FPD, change S_AXI_HPC to S_AXI_HP in column “Memport”.

For S_AXI_HPC1_FPD, change S_AXI_HPC to S_AXI_HP in column “Memport”.

Select S_AXI_HP0_FPD, S_AXI_HP1_FPD, S_AXI_HP2_FPD, S_AXI_HP3_FPD in column “Enabled”.

Type into the “sptag” column the names for these 6 interfaces so that they can be selected by v++ configuration during linking phase. HPC0, HPC1, HP0, HP1, HP2, HP3

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In “Platform Setup”, select AXI Ports for axi_interconnect_1:

Select M01_AXI, M02_AXI, M03_AXI, M04_AXI, M05_AXI, M06_AXI and M07_AXI in column “Enabled”.

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The modifications of the default design for the extensible platform are completed, now.

In Vivado, save block design by clicking on icon “Save Block Design”.

Continue the design path with Validate Design.

Validate Design

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Results of HW creation via Manual Track or Fast Track are identical.

Open diagram by clicking on zusys.bd if not already open.
In Diagram window, validate design by clicking on “Validate Design” icon.

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Received Critical Messages window indicates that input intr[0:0] of axi_intc_0 is not connected. This is expected. The Vitis extensible design flow will connect this input to interrupt outputs from generated HW IPs.

 Click OK.

Note
You can generate pdf of the block diagram by clicking to any place in diagram window and selecting “Save as PDF File”. Use the offered default file name:
~/work/te0820_84_240/test_board/vivado/zusys.pdf

Compile Created HW and Custom SW with Trenz Scripts

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In Vivado Tcl Console, type following script and execute it by Enter. It will take some time to compile HW. HW design and to export the corresponding standard XSA package with included bitstream.

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TE::hw_build_design -export_prebuilt

An archive for standard non-extensible system is created:
~/work/te0820_84_240/test_board/vivado/test_board_4ev_2gb.xsa

In Vivado Tcl Console, type the following script and execute it by Enter. It will take some time to compile.

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TE::sw_run_vitis -all

After the script controlling SW compilation is finished, the Vitis SDK GUI is opened.

Close the Vitis “Welcome” page.
Compile the two included SW projects.
Standalone custom Vitis platform TE0820-05-4DE21MA has been created and compiled. 

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The TE0820-05-4DE21MA Vitis platform includes Trenz Electronic custom first stage boot loader in folder zynqmp_fsbl. It includes SW extension specific for the Trenz module initialisation.

This custom zynqmp_fsbl project has been compiled into executable file fsbl.elf.  It is located in: ~/work/te0820_84_240/test_board/prebuilt/software/4ev_1e_2gb/fsbl.elf

This customised first stage boot loader is needed for the Vitis extensible platform.
We have used the standard Trenz scripts to generate it for next use in the extensible platform.

Exit the opened Vitis SDK project.

In Vivado top menu select File->Close Project to close project. Click OK.

In Vivado top menu select File->Exit to close Vivado. Click OK.

The exported Vitis Extensible Hardware platform named test_board_4ev_1e_2gb.xsa can be found in the vivado folder.

Copy Created Custom First Stage Boot Loader

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Up to now, test_board directory has been used for all development.
~/work/te0820_84_240/test_board

Create new folders:
~/work/te0820_84_240/test_board_pfm/pfm/boot
~/work/te0820_84_240/test_board_pfm/pfm/sd_dir

Copy the recently created custom first stage boot loader executable file from
~/work/te0820_84_240/test_board/prebuilt/software/4ev_1e_2gb/fsbl.elf
to
~/work/te0820_84_240/test_board_pfm/pfm/boot/fsbl.elf

Building Platform OS and SDK

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Configuration of the Default Trenz Petalinux for the Vitis Extensible Platform

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Change directory to the default Trenz Petalinux folder
~/work/te0820_84_240/test_board/os/petalinux

Source Vitis and Petalinux scripts to set environment for access to Vitis and PetaLinux tools.

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$ source /tools/Xilinx/Vitis/2022.2/settings64.sh
$ source ~/petalinux/2022.2/settings.sh

Configure petalinux with the test_board_4ev_2gb.xsa for the extensible design flow by executing:

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$ petalinux-config --get-hw-description=~/work/te0820_84_240/test_board/vivado


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Image Removed

Image Added

Select Exit->Yes to close this window.

Customize Root File System, Kernel, Device Tree and U-boot

Download the Vitis-AI 3.0 repository.
In browser, open page:

https://github.com/Xilinx/Vitis-AI/tree/3.0

Clik on green Code button and download Vitis-AI-3.0.zip file.
Unzip Vitis-AI-3.0.zip file to directory ~/Downloads/Vitis-AI.

Copy ~/Downloads/Vitis-AI to  ~/work/Vitis-AI-3.0 

Delete Vitis-AI-3.0.zip,  clean trash.

The directory ~/work/Vitis-AI-3.0 contains the Vitis-AI 3.0 framework, now.

To install the Vitis-AI 3.0 version of shared libraries into rootfs (when generating system image by PetaLinux) we have to copy recepies recipes-vitis-ai to the Petalinux project :

Copy  
~/work/Vitis-AI-3.0/src/vai_petalinux_recepies/recipes-vitis-ai

to
~/work/te0820_84_240/test_board/os/petalinux/project-spec/meta-user/

Delete file:
~/work/te0820_84_240/test_board/os/petalinux/project-spec/meta-user/recipes-vitis-ai/vart/vart_3.0_vivado.bb
and keep only the unmodified file:
~/work/te0820_84_240/test_board/os/petalinux/project-spec/meta-user/recipes-vitis-ai/vart/vart_3.0.bb

File vart_3.0.bb will create vart libraries for Vitis design flow with dependency on xrt. 

In text editor, modify the user-rootfsconfig file:
~/work/te0820_86_240/test_board/os/petalinux/project-spec/meta-user/conf/user-rootfsconfig

In text editor, append these lines:

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#Note: Mention Each package in individual line
#These packages will get added into rootfs menu entry
 
CONFIG_startup
CONFIG_webfwu
 
CONFIG_xrt
CONFIG_xrt-dev
CONFIG_zocl
CONFIG_opencl-clhpp-dev
CONFIG_opencl-headers-dev
CONFIG_packagegroup-petalinux-opencv
CONFIG_packagegroup-petalinux-opencv-dev
CONFIG_dnf
CONFIG_e2fsprogs-resize2fs
CONFIG_parted
CONFIG_resize-part
 
CONFIG_packagegroup-petalinux-vitisai
CONFIG_packagegroup-petalinux-self-hosted
CONFIG_cmake
 
CONFIG_packagegroup-petalinux-vitisai-dev
CONFIG_mesa-megadriver
CONFIG_packagegroup-petalinux-x11
CONFIG_packagegroup-petalinux-v4lutils
CONFIG_packagegroup-petalinux-matchbox
 
CONFIG_packagegroup-petalinux-vitis-acceleration
CONFIG_packagegroup-petalinux-vitis-acceleration-dev
 
CONFIG_vitis-ai-library
CONFIG_vitis-ai-library-dev
CONFIG_vitis-ai-library-dbg

xrt, xrt-dev and zocl  are required for Vitis acceleration flow.
dnf is for package management.
parted, e2fsprogs-resize2fs and resize-part can be used for ext4 partition resize.

Other included packages serve for natively building Vitis AI applications on target board and for running Vitis-AI demo applications with GUI.

The last three packages will enable use of the Vitis-AI 3.0 recepies for installation of the correspoding Vitis-AI 3.0 libraries into rootfs of PetaLinux.

Enable all required packages in Petalinux configuration, from the Ubuntu terminal with exception of vitis-ai-library-dev and 
vitis-ai-library-dbg:

Code Block
languagebash
$ petalinux-config -c rootfs

Select all user packages by typing “y” with exception of vitis-ai-library-dev and 
vitis-ai-library-dbg. All packages will have to have an asterisk. vitis-ai-library-dev and 
vitis-ai-library-dbg will stay indicated as unselected by: [ ].

Still in the RootFS configuration window, go to root directory by select Exit once.

Enable OpenSSH and Disable Dropbear

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Dropbear is the default SSH tool in Vitis Base Embedded Platform. If OpenSSH is used to replace Dropbear, the system could achieve faster data transmission speed over ssh. Created Vitis extensible platform applications may use remote display feature. Using of OpenSSH can improve the display experience.

Go to Image Features.
Disable ssh-server-dropbear and enable ssh-server-openssh and click Exit.

Go to Filesystem Packages->misc->packagegroup-core-ssh-dropbear and disable packagegroup-core-ssh-dropbear.

Go to Filesystem Packages level by Exit twice.

Go to console->network->openssh and enable openssh, openssh-sftp-server, openssh-sshd, openssh-scp.

Go to root level by selection of Exit four times.

Enable Package Management

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Package management feature can allow the board to install and upgrade software packages on the fly.

In rootfs config go to Image Features and enable package-management and debug_tweaks option
Click OK, Exit twice and select Yes to save the changes.

Disable CPU IDLE in Kernel Config

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CPU IDLE would cause processors get into IDLE state (WFI) when the processor is not in use. When JTAG is connected, the hardware server on host machine talks to the processor regularly. If it talks to a processor in IDLE status, the system will hang because of incomplete AXI transactions.

So, it is recommended to disable the CPU IDLE feature during project development phase.

It can be re-enabled after the design has completed to save power in final products.

Launch kernel config:

Code Block
languagebash
$ petalinux-config -c kernel

Ensure the following items are TURNED OFF by entering 'n' in the [ ] menu selection:

CPU Power Management->CPU Idle->CPU idle PM support

CPU Power Management->CPU Frequency scaling->CPU Frequency scaling

Exit and Yes to Save changes.

Add EXT4 rootfs Support

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Let PetaLinux generate EXT4 rootfs. In terminal, execute:

Code Block
languagebash
$ petalinux-config

Go to Image Packaging Configuration.
Enter into Root File System Type

Select Root File System Type  EXT4

Change the “Device node” of SD device from the default value
/dev/mmcblk0p2

to new value required for the TE0820 modules on TE0707 test board:
/dev/mmcblk1p2

Exit and Yes to save changes.

Let Linux Use EXT4 rootfs During Boot

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The setting of which rootfs to use during boot is controlled by bootargs. We would change bootargs settings to allow Linux to boot from EXT4 partition.

In terminal, execute:

Code Block
languagebash
$ petalinux-config

Change DTG settings->Kernel Bootargs->generate boot args automatically to NO.

Update User Set Kernel Bootargs to:
earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait cma=512M

Click OK, Exit three times and Save.

Build PetaLinux Image

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In terminal, build the PetaLinux project by executing:

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languagebash
$ petalinux-build

The PetaLinux image files will be generated in the directory:
~/work/te0820_84_240/test_board/os/petalinux/images/linux

Generation of PetaLinux takes some time and requires Ethernet connection and sufficient free disk space.

Create Petalinux SDK 

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The SDK is used by Vitis tool to cross compile applications for newly created platfom.

In terminal, execute:

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$ petalinux-build --sdk

The generated sysroot package sdk.sh will be located in directory
~/work/te0820_84_240/test_board/os/petalinux/images/linux
 
Generation of SDK package takes some time and requires sufficient free disk space.
Time needed for these two steps depends also on number of allocated processor cores.

Copy Files for Extensible Platform

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Copy these four files:

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FilesFromTo
bl31.elf
pmufw.elf
system.dtb
u-boot-dtb.elf		~/work/te0820_84_240/test_board/os/petalinux/images/linux~/work/te0820_84_240/test_board_pfm/pfm/boot


Rename the copied file u-boot-dtb.elf to u-boot.elf

The directory
~/work/te0820_84_240/test_board_pfm/pfm/boot
contains these five files:

  1. bl31.elf
  2. fsbl.elf
  3. pmufw.elf
  4. system.dtb
  5. u-boot.elf

Copy files:

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FilesFrom To
boot.scr
system.dtb		~/work/te0820_84_240/test_board/os/petalinux/images/linux~/work/te0820_84_240/test_board_pfm/pfm/sd_dir


Copy file:

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FileFromTo
init.sh~/work/te0820_84_240/test_board/misc/sd~/work/te0820_84_240/test_board_pfm/pfm/sd_dir



Note

init.sh is an place-holder for user defined bash code to be executed after the boot:

Code Block
languagebash
#!/bin/sh
normal="\e[39m"
lightred="\e[91m"
lightgreen="\e[92m"
green="\e[32m"
yellow="\e[33m"
cyan="\e[36m"
red="\e[31m"
magenta="\e[95m"

echo -ne $lightred
echo Load SD Init Script
echo -ne $cyan
echo User bash Code can be inserted here and put init.sh on SD
echo -ne $normal


Create Extensible Platform zip File

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Create new directory tree:
~/work/te0820_84_240_move/test_board/os/petalinux/images
~/work/te0820_84_240_move/test_board/Vivado
~/work/te0820_84_240_move/test_board_pfm/pfm/boot ~/work/te0820_84_240_move/test_board_pfm/pfm/sd_dir

Copy all files from the directory:

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FilesSourceDestination
all~/work/te0820_84_240/test_board/os/petalinux/images~/work/te0820_84_240_move/test_board/os/petalinux/images
all~/work/te0820_84_240/test_board_pfm/pfm/boot~/work/te0820_84_240_move/test_board_pfm/pfm/boot
all~/work/te0820_84_240/test_board_pfm/pfm/sd_dir~/work/te0820_84_240_move/test_board_pfm/pfm/sd_dir
test_board_4ev_1e_2gb.xsa~/work/te0820_84_240/test_board/Vivado/test_board_4ev_1e_2gb.xsa~/work/te0820_84_240_move/test_board/Vivado/test_board_4ev_1e_2gb.xsa


Zip the directory
~/work/te0820_84_240_move
into ZIP archive:
~/work/te0820_84_240_move.zip

The archive te0820_84_240_move.zip can be used to create extensible platform on the same or on an another PC with installed Ubuntu 20.04 and Vitis tools, with or without installed Petalinux. The archive includes all needed components, including the Xilinx xrt library and the script sdk.sh serving for generation of the sysroot .

The archive has size approximately 3.6 GB and it is valid for the initially selected module (84).
This is the te0820 HW module with xczu4ev-sfvc784-1-e device with 2 GB memory.
The extensible Vitis platform will have the default clock 240 MHz.

Move the te0820_84_240_move.zip file to an PC disk drive.

Delete:
~/work/te0820_84_240_move
~/work/te0820_84_240_move.zip
Clean the Ubuntu Trash.

Generation of SYSROOT

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This part of development can be direct continuation of the previous Petalinux configuration and compilation steps.

Note
Alternatively, it is also possible to implement all next steps on an Ubuntu 20.04 without installed PetaLinux Only the Ubuntu 20.04 and Vitis/Vivado installation is needed.
All required files created in the PetaLinux for the specific module (24) are present in the archive: te0820_84_240_move.zip
In this case, unzip the archive to the directory:
~/work/te0820_84_240_move
and copy all content of directories to
~/work/te0820_84_240
Delete the te0820_84_240_move.zip file and the ~/work/te0820_84_240_move directory to save filesystem space.

In Ubuntu terminal, change the working directory to:
~/work/te0820_84_240/test_board/os/petalinux/images/linux

In Ubuntu terminal, execute script enabling access to Vitis 2022.2 tools.
Execution of script serving for setting up PetaLinux environment is not necessary:

Code Block
languagebash
$ source /tools/Xilinx/Vitis/2022.2/settings64.sh

In Ubuntu terminal, execute script

Code Block
languagebash
$ ./sdk.sh -d ~/work/te0820_84_240/test_board_pfm

SYSROOT directories and files for PC and for Zynq Ultrascale+  will be created in:
~/work/te0820_84_240/test_board_pfm/sysroots/x86_64-petalinux-linux
~/work/te0820_84_240/test_board_pfm/sysroots/cortexa72-cortexa53-xilinx-linux

Once created, do not move these sysroot directories (due to some internally created paths).

Generation of Extensible Platform for Vitis

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In Ubuntu terminal, change the working directory to:
~/work/te0820_84_240/test_board_pfm

Start the Vitis tool by executing

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languagebash
$ vitis &

In Vitis “Launcher”, set the workspace for the extensible platform compilation:
~/work/te0820_84_240/test_board_pfm

Click on “Launch” to launch Vitis

Close Welcome page.

In Vitis, select in the main menu: File -> New -> Platform Project

Type name of the extensible platform:  te0820_84_240_pfm. Click Next.


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 Choose for hardware specification for the platform file:
 ~/work/te0820_84_240/test_board/vivado/test_board_4ev_1e_2gb.xsa

In “Software specification” select: linux
In “Boot Components” unselect Generate boot components
(these components have been already generated by Vivado and PetaLinux design flow)

New window te0820_84_240_pfm is opened.

Click on linux on psu_cortex53 to open window Domain: linux_domain

In “Description”: write xrt  

In “Bif File” find and select the pre-defied option:  Generate Bif

In “Boot Components Directory” select:
~/work/te0820_84_240/test_board_pfm/pfm/boot

In “FAT32 Partition Directory” select:
~/work/te0820_84_240/test_board_pfm/pfm/sd_dir

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In Vitis IDE “Explorer” section, click on te0820_84_240_pfm to highlight it.

Right-click on the highlighted te0820_84_240_pfm and select build project in the open submenu. Platform is compiled in few seconds.
Close the Vitis tool by selection: File -> Exit.

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Vits extensible platform te0820_84_240_pfm has been created in the directory:
~/work/te0820_84_240/test_board_pfm/te0820_84_240_pfm/export/te0820_84_240_pfm

Platform Usage

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Test 1: Read Platform Info

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With Vitis environment setup, platforminfo tool can report XPFM platform information.

Code Block
languagebash
platforminfo ~/work/te0820_84_240/test_board_pfm/te0820_84_240_pfm/export/te0820_84_240_pfm/te0820_84_240_pfm.xpfm


Code Block
languagetext
titleDetailed listing from platforminfo utility

==========================
Basic Platform Information
==========================
Platform:                te0820_84_240_pfm
File:               /home/devel/work/te0820_84_240/test_board_pfm/te0820_84_240_pfm/export/te0820_84_240_pfm/te0820_84_240_pfm.xpfm
Description:            
te0820_84_240_pfm
    

=====================================
Hardware Platform (Shell) Information
=====================================
Vendor:                           trenzvendor
Board:                            zusys
Name:                             zusys
Version:                          21.0
Generated Version:                2022.2.1                2022.2
Hardware:                         1
Software Emulation:               1
Hardware Emulation:               10
Hardware Emulation Platform:      0
FPGA Family:                      zynquplus
FPGA Device:                      xczu4ev
Board Vendor:                     trenz.biz
Board Name:                       trenz.biz:TE0820te0820_4ev_1e_TEBF0808:2.0
Board Part:                       xczu4ev-sfvc784-1-e

=================
Clock Information
=================
  Default Clock Index: 4
  Clock Index:         1
    Frequency:         100.000000
  Clock Index:         2
    Frequency:         200.000000
  Clock Index:         3
    Frequency:         400.000000
  Clock Index:         4
    Frequency:         240.000000

==================
Memory Information
==================
  Bus SP Tag: HP0
  Bus SP Tag: HP1
  Bus SP Tag: HP2
  Bus SP Tag: HP3
  Bus SP Tag: HPC0
  Bus SP Tag: HPC1

=============================
Software Platform Information
=============================
Number of Runtimes:            1
Default System Configuration:  te0820 te0820_84_240_pfm
System Configurations:
  System Config Name:                      te0820                      te0820_84_240_pfm
  System Config Description:                             te0820_84_240_pfm
  System Config Default Processor Group:   linux_domain
  System Config Default Boot Image:        standard
  System Config Is QEMU Supported:         1
  System Config Processor Groups:
    Processor Group Name:      linux on psu_cortexa53
    Processor Group CPU Type:  cortex-a53
    Processor Group OS Name:   linux
  System Config Boot Images:
    Boot Image Name:           standard
    Boot Image Type:           
    Boot Image BIF:            te0820            te0820_84_240_pfm/boot/linux.bif
    Boot Image Data:                te0820_84_240_pfm/linux_domain/image
    Boot Image Boot Mode:      sd
    Boot Image RootFileSystem: 
    Boot Image Mount Path:     /mnt
    Boot Image Read Me:            te0820te0820_84_240_pfm/boot/generic.readme
    Boot Image QEMU Args:         te0820te0820_84_240_pfm/qemu/pmu_args.txt:te0820_84_240_pfm/qemu/qemu_args.txt
    Boot Image QEMU Boot:      
    Boot Image QEMU Dev Tree:  
Supported Runtimes:
  Runtime: OpenCL

Test 2: Run Vector Addition Example

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Create new directory test_board_test_vadd  to test Vitis extendable flow example “vector addition”
~/work/te0820_84_240/test_board_test_vadd

Current directory structure:
~/work/te0820_84_240/test_board
~/work/te0820_84_240/test_board_pfm
~/work/te0820_84_240/test_board_test_vadd

Change working directory:

Code Block
languagebash
$cd ~/work/te0820_84_240/test_board_test_vadd

In Ubuntu terminal, start Vitis by:

Code Block
languagebash
$ vitis &

In Vitis IDE Launcher, select your working directory
~/work/te0820_84_240/test_board_test_vadd
Click on Launch to launch Vitis.

Select File -> New -> Application project. Click Next.

Skip welcome page if shown.

Click on “+ Add” icon and select the custom extensible platform te0820_84_240_pfm[custom] in the directory:
~/work/te0820_84_240/test_board_pfm/te0820_84_240_pfm/export/te0820_84_240_pfm

We can see available PL clocks and frequencies.

Note
PL4 with 240 MHz clock is has been set as default in the platform creation process.


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 Click Next.
In “Application Project Details” window type into Application project name: test_vadd
Click Next.
In “Domain window” type (or select by browse):
“Sysroot path”:
~/work/te0820_84_240/test_board_pfm/sysroots/cortexa72-cortexa53-xilinx-linux
“Root FS”:
~/work/te0820_84_240/test_board/os/petalinux/images/linux/rootfs.ext4
“Kernel Image”:
~/work/te0820_84_240/test_board/os/petalinux/images/linux/Image
Click Next.

In “Templates window”, if not done before, update “Vitis IDE Examples” and “Vitis IDE Libraries”.

Select Host Examples
In “Find”, type: “vector add” to search for the “Vector Addition” example.

Select: “Vector Addition”
Click Finish
New project template is created.

In test_vadd window menu “Active build configuration” switch from “SW Emulation” to “Hardware”.

In “Explorer” section of Vitis IDE, click on:  test_vadd_system[te0820_84_240_pfm] to select it.

Right Click on:  test_vadd_system[te0820_84_240_pfm] and select in the opened sub-menu:
Build project

Vitis will compile:
In test_vadd_kernels subproject, compile the krnl_vadd from C++ SW to HDL HW IP source code
In test_vadd_system_hw_link subproject, compile  the krnl_vadd HDL together with te0820_84_240_pfm into new, extended HW design with new accelerated (krnl_vadd) will run on the default 240 MHz clock. This step can take some time.
In test_vadd subproject, compile the vadd.cpp application example.

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Run Compiled Example Application

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The sd_card.img file is output of the compilation and packing by Vitis. It is located in directory:
~/work/te0820_84_240/test_board_test_vadd/test_vadd_system/Hardware/package/sd_card.img

Write the sd card image from the sd_card.img file to SD card.

Note
In Windows Pro 10 (or Windows 11 Pro) PC, inst all program Win32DiskImager  for this task. Win32 Disk Imager can write raw disk image to removable devices.
https://win32diskimager.org/

Insert the SD card to the TEBF0808 carrier board.

Connect PC USB terminal (115200 bps) card to the TEBF0808 carrier board.

Connect USB Keyboard and USB Mouse to the TEBF0808 carrier board.

Connect Ethernet cable to the TEBF0808 carrier board.

Power on the TEBF0808 carrier board.

In PC, find the assigned serial line COM port number for the USB terminal. In case of Win 10 use device manager.

In PC, open serial line terminal with the assigned COM port number. Speed 115200 bps.

Connect Monitor to the Display Port connector of the TEBF0808 carrier board.

On TEBF0808, press button S1 to start the system (press the button for cca. 1 sec. ).
(FMC fan starts to rotate, USB terminal starts to display booting information)

Display Port Monitor indicates text “Please wait: Booting…” (white text, black background).

X11 screen opens on Display port.

Mouse and keyboard connected to the TEBF0808 carrier board can be used.

Click on “Terminal” icon (A Unicode capable rxvt)

Terminal opens as an X11 graphic window.

In terminal, use keyboard connected to the TEBF0808 carrier board and type:

Code Block
languagebash
sh-5.0# cd /media/sd-mmcblk1p1/
sh-5.0# ./test_vadd krnl_vadd.xclbin

The application test_vadd should run with this output:

Code Block
languagebash
sh-5.0# cd /media/sd-mmcblk1p1/
sh-5.0# ./test_vadd krnl_vadd.xclbin
INFO: Reading krnl_vadd.xclbin
Loading: 'krnl_vadd.xclbin'
Trying to program device[0]: edge
Device[0]: program successful!
TEST PASSED
sh-5.0#

The Vitis application has been compiled to HW and evaluated on custom system
with extensible custom te0820_84_240_pfm platform.

Close the rxvt terminal emulator by click ”x” icon (in the upper right corner) or by typing:

Code Block
languagebash
# exit

In X11, click ”Shutdown” icon to close down safely.

System is halted. Messages relate to halt of the system can be seen on the USB terminal).
The Display Port output is switched off.
The TEBF0808 carrier board can be powered off by pressing on the S1 switch (cca. 1 sec long).
The FMC fan stops.

The SD card can be safely removed from the TEBF0808 carrier board, now.

The TEBF0808 carrier board can be disconnected from power.

Note


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The TEBF0808 carrier with TE0820-02-04eg-1e-2gb module is running the PetaLinux OS and drives simple version of an X11 GUI on monitor with Display Port. Application test_vadd is executed. 

 

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languagebash
titleFull listing of PC USB petalinux console after following operations are performed:
collapsetrue

-------------------------------------------------------------------------------- 
TE0820 TE_XFsbl_HookPsuInit_Custom
Configure Carrier I2C Switch 0x77
Configure PLL: SI5338-B
Si5338 Init Registers Write.
Si5338 Init Complete
PLL Status Register 218:0x8
USB Reset Complete
PCIeETH Reset Complete

--------------------------------------------------------------------------------

--------------------------------------------------------------------------------
Xilinx Zynq MP First Stage Boot Loader (TE modified)
Release 2022.2    OctAug 2129 20222023  -  1817:4542:3655
Device Name: XCZU4EV

-------------------------------------------------------------------------------- 
TE0820 TE_XFsbl_BoardInit_Custom
Configure Carrier I2C Switch 0x73 for EEPROM access
Configure Carrier I2C Switch 0x77 to avoid conflicts with EEPROM

--------------------------------------------------------------------------------
NOTICE:
--------------------------------------------------------------------------------
TE0820 TE_XFsbl_HookAfterBSDownload_Custom

--------------------------------------------------------------------------------
NOTICE:  BL31: v2.46(release):xlnx_rebase_v2.46_20212022.1_update1update3-2318-g9188496b9g0897efd45
NOTICE:  BL31: Built : 0703:4155:2403, Sep Oct 139 20212022


U-Boot 20212022.01 (OctSep 1220 20212022 - 0906:2835:4233 +0000)TE0820

CPU:   ZynqMP
Silicon: v3
Board: Xilinx ZynqMP
DRAM:  2 GiB
PMUFW:  v1.1
PMUFW no permission to change config object
EL Level:       EL2
Chip ID:        zu4ev
NAND:  0 MiB
MMC:   mmc@ff160000: 0, mmc@ff170000: 1
Loading Environment from FATnowhere... Unable to use mmc 0:0... OK
In:    serial
Out:   serial
Err:   serial
Bootmode: SD_MODE1
Reset reason:   EXTERNAL
Net:   FEC: can't find phy-handle

ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 1, interface rgmii-id

WarningError: ethernet@ff0e0000 address not set.
No ethernet found.

scanning bus for devices...
starting USB...
Bus usb@fe200000: Register 2000440 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus usb@fe200000 for devices... 1 USB Device(eth0) using random MAC address - c2:53:72:1f:8c:5f
eth0: ethernet@ff0e0000s) found
       scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot.scr
27102777 bytes read in 1615 ms (165180.7 KiB/s)
## Executing script at 20000000
Trying to load boot images from mmc1
2178713621457408 bytes read in 16201654 ms (12.84 MiB/s)
4141541563 bytes read in 1817 ms (2.23 MiB/s)
## Flattened Device Tree blob at 00100000
   Booting using the fdt blob at 0x100000
FEC: can't find phy-handle

ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 1, interface rgmii-id

Error: ethernet@ff0e0000 address not set.
FEC: can't find phy-handle

ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 1, interface rgmii-id

Error: ethernet@ff0e0000 address not set.
   Loading Device Tree to 000000007dd04000000000007bbee000, end 000000007dd111c6000000007bbfb25a ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 5.1015.036-xilinx-v2022.2 (oe-user@oe-host) (aarch64-xilinx-linux-gcc (GCC) 1011.2.0, GNU ld (GNU Binutils) 2.3537.120210721) #1 SMP TueMon Oct 123 0907:3050:5707 UTC 20212022
[    0.000000] Machine model: xlnx,zynqmp
[    0.000000] earlycon: cdns0 at MMIO 0x00000000ff000000 (options '115200n8')
[    0.000000] printk: bootconsole [cdns0] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 512 MiB at 0x000000005dc00000
[    0.000000] Zone ranges:
[    0.000000]   DMA32    [mem 0x0000000000000000-0x000000007fefffff]
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000007fefffff]
[    0.000000] Zeroed struct page in unavailable ranges: 256 pages
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000007fefffff]
[    0.000000] psci On node 0, zone DMA32: probing256 forpages conduitin method from DT.unavailable ranges
[    0.000000] pscicma: PSCIv1.1Reserved detected 512 MiB at 0x000000005b800000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: MIGRATE_INFO_TYPE not supported.
[    0.000000] psci: SMC Calling Convention v1.2
[    0.000000] percpu: Embedded 2218 pages/cpu s49624s34328 r8192 d32296d31208 u90112u73728
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 515844
[    0.000000] Kernel command line: earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait cma=512M
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 1509440K1509816K/2096128K available (14080K13824K kernel code, 988K986K rwdata, 3964K3896K rodata, 2112K init, 591K573K bss, 62400K62024K reserved, 524288K cma-reserved)
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=4.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
[    0.000000] GIC:Root UsingIRQ split EOI/Deactivate modehandler: gic_handle_irq
[    0.000000] irq-xilinxGIC: /amba_pl@0/interrupt-controller@80000000: num_irq=32, sw_irq=0, edge=0x0Using split EOI/Deactivate mode
[    0.000000] random: get_random_bytes called from start_kernel+0x31c0x474/0x5240x6d8 with crng_init=0
[    0.000000] arch_timer: cp15 timer(s) running at 33.33MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x7b00c38480x7b00c47c0, max_idle_ns: 440795203375440795202120 ns
[    0.000003000000] sched_clock: 56 bits at 33MHz, resolution 30ns, wraps every 2199023255545ns2199023255541ns
[    0.008300008296] Console: colour dummy device 80x25
[    0.012393012394] Calibrating delay loop (skipped), value calculated using timer frequency.. 66.66 BogoMIPS (lpj=133333)
[    0.022668022665] pid_max: default: 32768 minimum: 301
[    0.027405027459] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.034613034608] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.043500043470] rcu: Hierarchical SRCU implementation.
[    0.047413047379] EFI services will not be available.
[    0.051800051792] smp: Bringing up secondary CPUs ...
[    0.056554056522] Detected VIPT I-cache on CPU1
[    0.056594056562] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.057015056961] Detected VIPT I-cache on CPU2
[    0.057042056985] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[    0.057443057361] Detected VIPT I-cache on CPU3
[    0.057468057384] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[    0.057525057428] smp: Brought up 1 node, 4 CPUs
[    0.091608091605] SMP: Total of 4 processors activated.
[    0.096280096277] CPU features: detected: 32-bit EL0 Support
[    0.101384101381] CPU features: detected: CRC32 instructions
[    0.106524106520] CPU: All CPU(s) started at EL2
[    0.110566110562] alternatives: patching kernel code
[    0.116096115890] devtmpfs: initialized
[    0.123092122631] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.127953127950] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[    0.147944147761] pinctrl core: initialized pinctrl subsystem
[    0.148379148207] DMI not present or invalid.
[    0.151538151411] NET: Registered PF_NETLINK/PF_ROUTE protocol family 16
[    0.157373158138] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0.162882164166] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.170677171969] audit: initializing netlink subsys (disabled)
[    0.176090177362] audit: type=2000 audit(0.116:1): state=initialized audit_enabled=0 res=1
[    0.176487177727] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.190503191785] ASID allocator initialised with 65536 entries
[    0.195922197198] Serial: AMBA PL011 UART driver
[    0.226761219032] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[    0.227816220090] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[    0.234489226760] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0.241162233415] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[    1.442191309266] cryptd: max_cpu_qlen set to 1000
[    1.470010333274] DRBG: Continuing without Jitter RNG
[    1.548846436879] raid6: neonx8   gen()  18622116 MB/s
[    1.616899504929] raid6: neonx8   xor()  13971581 MB/s
[    1.684982573000] raid6: neonx4   gen()  19102169 MB/s
[    1.753046641053] raid6: neonx4   xor()  13691551 MB/s
[    1.821122709124] raid6: neonx2   gen()  18122069 MB/s
[    1.889196777179] raid6: neonx2   xor()  12601428 MB/s
[    1.957278845254] raid6: neonx1   gen()  15491763 MB/s
[    21.025343913304] raid6: neonx1   xor()  10671207 MB/s
[    21.093419981382] raid6: int64x8  gen()  12571354 MB/s
[    2.161487049424] raid6: int64x8  xor()   674773 MB/s
[    2.229584117503] raid6: int64x4  gen()  13981597 MB/s
[    2.297646185551] raid6: int64x4  xor()   717848 MB/s
[    2.365728253626] raid6: int64x2  gen()  12241397 MB/s
[    2.433792321672] raid6: int64x2  xor()   655747 MB/s
[    2.501888389748] raid6: int64x1  gen()   9011033 MB/s
[    2.569954457795] raid6: int64x1  xor()   452517 MB/s
[    2.569993457833] raid6: using algorithm neonx4 gen() 19102169 MB/s
[    2.573950461787] raid6: .... xor() 13691551 MB/s, rmw enabled
[    2.578882466723] raid6: using neon recovery algorithm
[    2.583947471762] iommu: Default domain type: Translated
[    2.476154] iommu: DMA domain TLB invalidation policy: strict mode
[    2.588546482591] SCSI subsystem initialized
[    2.592181486236] usbcore: registered new interface driver usbfs
[    2.597509491576] usbcore: registered new interface driver hub
[    2.602784496848] usbcore: registered new device driver usb
[    2.607832501907] mc: Linux media interface: v0.10
[    2.612030506097] videodev: Linux video capture interface: v2.00
[    2.511562] pps_core: LinuxPPS API ver. 1 registered
[    2.516461] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    2.525552] PTP clock support registered
[    2.617505529454] EDAC MC: Ver: 3.0.0
[    2.620964532824] zynqmp-ipi-mbox mailbox@ff990400: Registered ZynqMP IPI mbox with TX/RX channels.
[    2.629252541215] FPGA manager framework
[    2.632547544510] Advanced Linux Sound Architecture Driver Initialized.
[    2.638794550768] Bluetooth: Core ver 2.22
[    2.642038554015] NET: Registered PF_BLUETOOTH protocol family 31
[    2.646440559279] Bluetooth: HCI device and connection manager initialized
[    2.652757565596] Bluetooth: HCI socket layer initialized
[    2.657599570438] Bluetooth: L2CAP socket layer initialized
[    2.662621575460] Bluetooth: SCO socket layer initialized
[    2.667740580623] clocksource: Switched to clocksource arch_sys_counter
[    2.673672586484] VFS: Disk quotas dquot_6.6.0
[    2.677454590282] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    2.689063601392] NET: Registered PF_INET protocol family
[    2.602012] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    2.689474610184] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    2.697074617777] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    2.705031625727] TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)
[    2.712396633084] TCP: Hash tables configured (established 16384 bind 16384)
[    2.718736639446] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    2.725373646076] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    2.732553653233] NET: Registered PF_UNIX/PF_LOCAL protocol family 1
[    2.737040659038] RPC: Registered named UNIX socket transport module.
[    2.742639664645] RPC: Registered udp transport module.
[    2.747301669310] RPC: Registered tcp transport module.
[    2.751972673977] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    2.759025680383] PCI: CLS 0 bytes, default 64
[    2.791026684592] Initialise systemarmv8-pmu pmu: hw perfevents: no interrupt-affinity property, guessing.
[    2.692048] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
[    2.725184] Initialise system trusted keyrings
[    2.791157725318] workingset: timestamp_bits=46 max_order=19 bucket_order=0
[    2.796988731101] NFS: Registering the id_resolver key type
[    2.801271735429] Key type id_resolver registered
[    2.805420739571] Key type id_legacy registered
[    2.809408743566] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    2.750214] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    2.816065757577] jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
[    2.864979801444] NET: Registered PF_ALG protocol family 38
[    2.865024801490] xor: measuring software checksum speed
[    2.873314809522]    8regs           :  20682363 MB/sec
[    2.877373813191]    32regs          :  24492799 MB/sec
[    2.882139818263]    arm64_neon      :  20832308 MB/sec
[    2.882178818323] xor: using function: 32regs (24492799 MB/sec)
[    2.886539823347] Key type asymmetric registered
[    2.890602827411] Asymmetric key parser 'x509' registered
[    2.895467832291] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247244)
[    2.902800839609] io scheduler mq-deadline registered
[    2.907301844106] io scheduler kyber registered
[    2.913411] ps_pcie_dma init()848350] irq-xilinx: mismatch in kind-of-intr param
[    2.943867853192] Serialirq-xilinx: 8250/16550 driver, 4 ports, IRQ sharing disabled/amba_pl@0/interrupt-controller@a0000000: num_irq=32, sw_irq=0, edge=0x1
[    2.945706890448] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[    2.892199] Serial: AMBA driver
[    2.950150895062] cacheinfo: Unable to detect cache hierarchy for CPU 0
[    2.958750904765] brd: module loaded
[    2.963567908245] loop: module loaded
[    2.965010909107] mtdoops: mtd device (mtddev=name/number) must be supplied
[    2.969038] libphy: Fixed MDIO Bus: probed
[    2.972949915669] tun: Universal TUN/TAP device driver, 1.6
[    2.976649917982] CAN device driver interface
[    2.981144922331] usbcore: registered new interface driver asix
[    2.985767927104] usbcore: registered new interface driver ax88179_178a
[    2.991805933147] usbcore: registered new interface driver cdc_ether
[    2.997601938939] usbcore: registered new interface driver net1080
[    32.003228944559] usbcore: registered new interface driver cdc_subset
[    32.009104950441] usbcore: registered new interface driver zaurus
[    32.014650955985] usbcore: registered new interface driver cdc_ncm
[    32.021154962230] usbcore: registered new interface driver uas
[    32.025556966891] usbcore: registered new interface driver usb-storage
[    32.032119973459] rtc_zynqmp ffa60000.rtc: registered as rtc0
[    32.036696978031] rtc_zynqmp ffa60000.rtc: setting system clock to 19702023-0108-01T0030T10:0052:0634 UTC (61693392754)
[    32.044771986890] i2c_dev: i2c /dev entries driver
[    32.049842992711] usbcore: registered new interface driver uvcvideo
[    3.053890] USB Video Class driver (1.1.1)
[    3.0584842.997197] Bluetooth: HCI UART driver ver 2.3
[    3.062371001203] Bluetooth: HCI UART protocol H4 registered
[    3.067470006303] Bluetooth: HCI UART protocol BCSP registered
[    3.072765011593] Bluetooth: HCI UART protocol LL registered
[    3.077850016683] Bluetooth: HCI UART protocol ATH3K registered
[    3.083231022060] Bluetooth: HCI UART protocol Three-wire (H5) registered
[    3.089478028305] Bluetooth: HCI UART protocol Intel registered
[    3.094818033653] Bluetooth: HCI UART protocol QCA registered
[    3.100020038853] usbcore: registered new interface driver bcm203x
[    3.105644044471] usbcore: registered new interface driver bpa10x
[    3.111182050010] usbcore: registered new interface driver bfusb
[    3.116630055457] usbcore: registered new interface driver btusb
[    3.122092060917] usbcore: registered new interface driver ath3k
[    3.127590066412] EDAC MC: ECC not enabled
[    3.131176069999] EDAC DEVICE0: Giving out device to module edac controller cache_err: DEV edac (POLLED)
[    3.140129078943] EDAC DEVICE1: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
[    3.152357091211] sdhci: Secure Digital Host Controller Interface driver
[    3.158209097042] sdhci: Copyright(c) Pierre Ossman
[    3.162532101366] sdhci-pltfm: SDHCI platform and OF driver helper
[    3.168499107287] ledtrig-cpu: registered to indicate activity on CPUs
[    3.174139113049] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    3.180566119421] zynqmp_firmware_probe Platform Management API v1.1
[    3.186324125157] zynqmp_firmware_probe Trustzone version v1.0
[    3.253136157446] securefw securefw: securefw probed
[    3.253411] alg157572] zynqmp_aes firmware:zynqmp-firmware:zynqmp-aes: The zynqmp-aes driver shall be deprecated in 2022.2 and removed in 2023.1
[    3.168417] alg: No test for xilinx-zynqmp-aes (zynqmp-aes)
[    3.257594173840] zynqmp_aes firmware:zynqmp-firmware:zynqmp-aes: AES Successfully Registered
[    3.181887] zynqmp-keccak-384 firmware:zynqmp-firmware:sha384: The zynqmp-sha-deprecated driver shall be deprecated in 2022.2 and removed in 2023.1 release
[    3.265720195686] alg: No test for xilinx-keccak-384 (zynqmp-keccak-384)
[    3.271898201942] alg: No test for xilinx-zynqmp-rsa (zynqmp-rsa)
[    3.277366207445] usbcore: registered new interface driver usbhid
[    3.282744212832] usbhid: USB HID core driver
[    3.289495219612] ARM CCI_400_r1 PMU driver probed
[    3.289989220218] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[    3.297663227661] usbcore: registered new interface driver snd-usb-audio
[    3.304226234169] pktgen: Packet Generator for packet performance testing. Version: 2.75
[    3.311514241718] Initializing XFRM netlink socket
[    3.315168245256] NET: Registered PF_INET6 protocol family 10
[    3.319958250570] Segment Routing with IPv6
[    3.253763] In-situ OAM (IOAM) with IPv6
[    3.323301257703] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    3.329401263841] NET: Registered PF_PACKET protocol family 17
[    3.333444268551] NET: Registered PF_KEY protocol family 15
[    3.337853273307] can: controller area network core
[    3.342197277646] NET: Registered PF_CAN protocol family 29
[    3.346582282382] can: raw protocol
[    3.349522285319] can: broadcast manager protocol
[    3.353677289474] can: netlink gateway - max_hops=1
[    3.358075293867] Bluetooth: RFCOMM TTY layer initialized
[    3.362851298646] Bluetooth: RFCOMM socket layer initialized
[    3.367956303752] Bluetooth: RFCOMM ver 1.11
[    3.371662307464] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[    3.376940312736] Bluetooth: BNEP filters: protocol multicast
[    3.382133317929] Bluetooth: BNEP socket layer initialized
[    3.387060322856] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
[    3.392944328740] Bluetooth: HIDP socket layer initialized
[    3.333697] 8021q: 802.1Q VLAN Support v1.8
[    3.398002337913] 9pnet: Installing 9P2000 support
[    3.402127342077] Key type dns_resolver registered
[    3.406487346423] registered taskstats version 1
[    3.410416350371] Loading compiled-in X.509 certificates
[    3.416212356258] Btrfs loaded, crc32c=crc32c-generic, zoned=no, fsverity=no
[    3.429203370332] ff000000.serial: ttyPS0 at MMIO 0xff000000 (irq = 5660, base_baud = 6249999) is a xuartps
[    3.438228379364] printk: console [ttyPS0] enabled
[    3.438228379364] printk: console [ttyPS0] enabled
[    3.442525383656] printk: bootconsole [cdns0] disabled
[    3.442525383656] printk: bootconsole [cdns0] disabled
[    3.451848392872] of-fpga-region fpga-full: FPGA Region probed
[    3.461906404044] nwlxilinx-zynqmp-pciedma fd0e0000fd500000.pciedma-controller: hostZynqMP DMA bridge /axi/pcie@fd0e0000 ranges:driver Probe success
[    3.468805412131] nwlxilinx-zynqmp-pciedma fd0e0000fd510000.pciedma-controller: ZynqMP DMA driver   MEM 0x00e0000000..0x00efffffff -> 0x00e0000000Probe success
[    3.476815420212] nwlxilinx-zynqmp-pciedma fd0e0000fd520000.pciedma-controller: ZynqMP DMA driver   MEM 0x0600000000..0x07ffffffff -> 0x0600000000Probe success
[    3.484893428284] nwlxilinx-zynqmp-pciedma fd0e0000fd530000.pciedma-controller: Link is DOWNZynqMP DMA driver Probe success
[    3.489669436369] nwlxilinx-zynqmp-pciedma fd0e0000fd540000.pciedma-controller: PCIZynqMP hostDMA bridgedriver toProbe bus 0000:00
[success
[     3.495855444449] pci_bus 0000:00: root bus resource [bus 00-ff]xilinx-zynqmp-dma fd550000.dma-controller: ZynqMP DMA driver Probe success
[    3.501336452544] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff]xilinx-zynqmp-dma fd560000.dma-controller: ZynqMP DMA driver Probe success
[    3.508210460625] pci_bus 0000:00: root bus resource [mem 0x600000000-0x7ffffffff pref]xilinx-zynqmp-dma fd570000.dma-controller: ZynqMP DMA driver Probe success
[    3.515708468777] pci 0000:00:00.0: [10ee:d021] type 01 class 0x060400xilinx-zynqmp-dma ffa80000.dma-controller: ZynqMP DMA driver Probe success
[    3.521773476852] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hotxilinx-zynqmp-dma ffa90000.dma-controller: ZynqMP DMA driver Probe success
[    3.530593484939] pci 0000:00:00.0: PCI bridge to [bus 01-0c]xilinx-zynqmp-dma ffaa0000.dma-controller: ZynqMP DMA driver Probe success
[    3.535909493014] ps_pcie_xilinx-zynqmp-dma 0000:00:00.0ffab0000.dma-controller: PSZynqMP PCIeDMA DMAdriver DriverProbe probesuccess
[    3.542122501102] xilinx-zynqmp-dma fd500000ffac0000.dma-controller: ZynqMP DMA driver Probe success
[    3.549328509186] xilinx-zynqmp-dma fd510000ffad0000.dma-controller: ZynqMP DMA driver Probe success
[    3.556533517267] xilinx-zynqmp-dma fd520000ffae0000.dma-controller: ZynqMP DMA driver Probe success
[    3.563743525347] xilinx-zynqmp-dma fd530000ffaf0000.dma-controller: ZynqMP DMA driver Probe success
[    3.570943534010] xilinxspi-zynqmp-dmanor fd540000spi0.dma0: ZynqMPmt25qu512a DMA driver Probe success(131072 Kbytes)
[    3.578144539171] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success4 fixed-partitions partitions found on MTD device spi0.0
[    3.585341545516] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe successCreating 4 MTD partitions on "spi0.0":
[    3.592541550301] xilinx0x000000000000-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success0x000000a00000 : "qspi-boot"
[    3.599816556337] xilinx0x000000a00000-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success0x000002a00000 : "qspi-kernel"
[    3.607035562449] xilinx0x000002a00000-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success0x000002a40000 : "qspi-bootenv"
[    3.614233568634] xilinx0x000002a40000-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success0x000002ac0000 : "bootscr"
[    3.621429569545] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe successzynqmp_pll_disable() clock disable failed for dpll_int, ret = -13
[    3.628630580943] xilinx-zynqmp-dmaaxipmon ffac0000ffa00000.dmaperf-monitor: ZynqMPProbed DMA driver Probe successXilinx APM
[    3.635839587462] xilinx-zynqmp-dmaaxipmon ffad0000fd0b0000.dmaperf-monitor: ZynqMPProbed DMA driver Probe successXilinx APM
[    3.643033593954] xilinx-zynqmp-dmaaxipmon ffae0000fd490000.dmaperf-monitor: ZynqMPProbed DMA driver Probe successXilinx APM
[    3.650228600434] xilinx-zynqmp-dmaaxipmon ffaf0000ffa10000.dmaperf-monitor: ZynqMPProbed DMA driver Probe successXilinx APM
[    3.657677627785] xilinxxhci-zynqmp-dpdma fd4c0000.dma-controller: Xilinx DPDMA engine is probedhcd xhci-hcd.1.auto: xHCI Host Controller
[    3.666547633276] zynqmpxhci-display fd4a0000.display: vtc bridge property not presenthcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
[    3.675630641036] xilinxxhci-dp-snd-codec fd4a0000.display:zynqmp_dp_snd_codec0: Xilinx DisplayPort Sound Codec probedhcd xhci-hcd.1.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x0000000002010090
[    3.685894650442] xilinxxhci-dp-snd-pcm zynqmp_dp_snd_pcm0: Xilinx DisplayPort Sound PCM probedhcd xhci-hcd.1.auto: irq 65, io mem 0xfe200000
[    3.694140656572] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm1: Xilinx DisplayPort Sound PCM probedusb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.15
[    3.703154664839] xilinx-dp-snd-card fd4a0000.display:zynqmp_dp_snd_card: ASoC: no DMI vendor name!usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    3.712033672055] xilinx-dp-snd-card fd4a0000.display:zynqmp_dp_snd_card: Xilinx DisplayPort Sound Card probedusb usb1: Product: xHCI Host Controller
[    3.721615676932] usb OFusb1: graphManufacturer: no port node found in /axi/display@fd4a0000Linux 5.15.36-xilinx-v2022.2 xhci-hcd
[    3.728165683711] xlnx-drm xlnx-drm.0usb usb1: bound fd4a0000.display (ops 0xffff800010e9b9c8)SerialNumber: xhci-hcd.1.auto
[    3.856616688876] Console hub 1-0:1.0: switchingUSB to colour frame buffer device 128x48hub found
[    3.876213692647] hub zynqmp-display fd4a0000.display: [drm] fb0: xlnxdrmfb frame buffer device1-0:1.0: 1 port detected
[    3.884273696762] [drm] Initialized xlnx 1.0.0 20130509 for fd4a0000.display on minor 0xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
[    3.891772702250] zynqmpxhci-display fd4a0000.display: ZynqMP DisplayPort Subsystem driver probedhcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
[    3.900168709906] ahcixhci-ceva fd0c0000.ahcihcd xhci-hcd.1.auto: supplyHost ahcisupports not found, using dummy regulatorUSB 3.0 SuperSpeed
[    3.907719716467] ahci-ceva fd0c0000.ahci: supply phy not found, using dummy regulatorusb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[    3.915149724705] ahci-ceva fd0c0000.ahciusb usb2: supplyNew targetUSB notdevice found, using dummy regulatoridVendor=1d6b, idProduct=0003, bcdDevice= 5.15
[    3.933010732972] ahci-ceva fd0c0000.ahciusb usb2: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl platform modeNew USB device strings: Mfr=3, Product=2, SerialNumber=1
[    3.941973740191] ahci-ceva fd0c0000.ahciusb usb2: flagsProduct: 64bitxHCI ncqHost sntfController
[ pm clo only pmp fbs pio slum part ccc sds apst3.745063] usb usb2: Manufacturer: Linux 5.15.36-xilinx-v2022.2 xhci-hcd
[    3.952709751849] usb scsiusb2: host0SerialNumber: ahci-cevaxhci-hcd.1.auto
[    3.956336756975] scsi host1: ahci-cevahub 2-0:1.0: USB hub found
[    3.959801760739] ata1: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x100 irq 53hub 2-0:1.0: 1 port detected
[    3.967713765533] ata2at24 0-0050: SATAsupply maxvcc UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x180 irq 53not found, using dummy regulator
[    3.976700772174] spi-norat24 spi0.0-0050: 256 tryingbyte to24aa025 lockEEPROM, alreadywritable, unlocked1 areabytes/write
[    3.982711778995] spicdns-nori2c spi0ff020000.0: n25q512a (131072 Kbytes)i2c: 400 kHz mmio ff020000 irq 40
[    3.987695785228] 4 fixed-partitions partitions found on MTD device spi0.0cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 60s
[    3.994051792675] Creating 4 MTD partitions on "spi0.0":cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10s
[    3.998838801091] 0x000000000000-0x000000a00000 : "boot"
[    4.004504] 0x000000a00000-0x000000a40000 : "bootenv"macb ff0e0000.ethernet: Not enabling partial store and forward
[    43.010319809653] 0x000000a40000-0x000002a40000 : "kernel"macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 38 (68:27:19:a7:6e:ca)
[    43.016043] 0x000002a40000-0x000002ac0000 : "bootscr"822165] of_cfs_init
[    3.824645] of_cfs_init: OK
[    43.023003827545] macb ff0e0000.ethernetclk: Not enablingdisabling partial store and forwardunused clocks
[    43.030518832043] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APMALSA device list:
[    43.037115832631] xilinx-axipmon fd0b0000.perf-monitor: Probed Xilinx APM mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA 64-bit
[    43.043671] xilinx-axipmon fd490000.perf-monitor: Probed Xilinx APM834668] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA 64-bit
[    43.050239835001] xilinx-axipmon ffa10000.perf-monitor: Probed Xilinx APM No soundcards found.
[    43.072590854187] xhci-hcd xhci-hcd.1.auto: xHCI Host ControllerWaiting for root device /dev/mmcblk1p2...
[    43.078087906127] xhci-hcd xhci-hcd.1.autommc1: new USBhigh busspeed registered,SDHC assignedcard busat numberaddress 11388
[    43.085847911989] xhci-hcd xhci-hcd.1.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x0000000002010810mmcblk1: mmc1:1388 USD00 14.7 GiB
[    43.095263915010] xhci-hcd xhci-hcd.1.auto: irq 95, io mem 0xfe200000mmc0: new high speed MMC card at address 0001
[    43.101393918048] usb usb1mmcblk1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10p1 p2
[    3.922158] mmcblk0: mmc0:0001 IS008G 7.28 GiB
[    43.109663930695] usb usb1mmcblk0boot0: New USB device strings: Mfr=3, Product=2, SerialNumber=1mmc0:0001 IS008G 4.00 MiB
[    43.116880936633] usb usb1mmcblk0boot1: Productmmc0:0001 xHCIIS008G Host4.00 ControllerMiB
[    43.121755942372] usb usb1mmcblk0rpmb: Manufacturermmc0:0001 LinuxIS008G 5.10.0-xilinx-v2022.2 xhci-hcd4.00 MiB, chardev (241:0)
[    43.128447963717] usb usb1EXT4-fs (mmcblk1p2): SerialNumber: xhci-hcd.1.auto
[    4.133629] hub 1-0:1.0: USB hub foundmounted filesystem with ordered data mode. Opts: (null). Quota mode: none.
[    43.137394973499] hub 1-0:1.0: 1 port detectedVFS: Mounted root (ext4 filesystem) on device 179:2.
[    43.141521980218] xhci-hcd xhci-hcd.1.auto: xHCI Host Controllerdevtmpfs: mounted
[    43.147012983760] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 Freeing unused kernel memory: 2112K
[    3.988344] Run /sbin/init as init process
[    4.154667208829] xhci-hcd xhci-hcd.1.autorandom: Hostfast supports USB 3.0 SuperSpeedinit done
[    4.161307738784] usb usb2systemd[1]: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
[    4.169570] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    4.176786] usb usb2: Product: xHCI Host Controller
[    4.181655] usb usb2: Manufacturer: Linux 5.10.0-xilinx-v2022.2 xhci-hcdsystemd 249.7+ running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK -PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 -LZ4 -XZ -ZLIB +ZSTD +XKBCOMMON +UTMP +SYSVINIT default-hierarchy=hybrid)
[    4.188347769082] usb usb2systemd[1]: SerialNumber: xhci-hcd.1.auto
[    4.193505] hub 2-0:1.0: USB hub foundDetected architecture arm64.

Welcome to PetaLinux 2022.2_release_S10071807 (honister)!

[    4.197272813323] hub 2-0:1.0: 1 port detectedsystemd[1]: Hostname set to <trenz>.
[    4.202590977497] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 2
[    4.207515] i2c i2c-0: Added multiplexed i2c bus 3
[    4.212451] i2c i2c-0: Added multiplexed i2c bus 4
[    4.217387] i2c i2c-0: Added multiplexed i2c bus 5service '/etc/init.d/urandom' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.222326019484] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 6
[    4.227524] at24 7-0050: supply vcc not found, using dummy regulator
[    4.234324] at24 7-0050: 256 byte 24aa025 EEPROM, writable, 1 bytes/write
[    4.241155] i2c i2c-0: Added multiplexed i2c bus 7service '/etc/init.d/sendsigs' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.246115043453] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 8
[    4.251053] i2c i2c-0: Added multiplexed i2c bus 9
[    4.255850] pca954x 0-0073: registered 8 multiplexed busses for I2C switch pca9548
[    4.263840] i2c i2c-0: Added multiplexed i2c bus 10service '/etc/init.d/busybox-httpd' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.268864068141] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 11
[    4.273883] i2c i2c-0: Added multiplexed i2c bus 12
[    4.278904] i2c i2c-0: Added multiplexed i2c bus 13
[    4.283923] i2c i2c-0: Added multiplexed i2c bus 14service '/etc/init.d/umountfs' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.288942092072] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 15
[    4.290004] ata1: SATA link down (SStatus 0 SControl 330)
[    4.293968] i2c i2c-0: Added multiplexed i2c bus 16
[    4.299240] ata2: SATA link down (SStatus 0 SControl 330)service '/etc/init.d/umountnfs.sh' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.304253116344] i2c i2c-0systemd-sysv-generator[241]: AddedSysV multiplexed i2c bus 17
[    4.314342] pca954x 0-0077: registered 8 multiplexed busses for I2C switch pca9548
[    4.321948] cdns-i2c ff020000.i2c: 400 kHz mmio ff020000 irq 41service '/etc/init.d/halt' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.328293139943] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 60s
[    4.335826] cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10s
[    4.344312] macb ff0e0000.ethernet: Not enabling partial store and forwardsystemd-sysv-generator[241]: SysV service '/etc/init.d/save-rtc.sh' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.352540164966] libphy: MACB_mii_bus: probed
[    4.357160] macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 39 (54:10:ec:65:33:f6)
[    4.369901] of_cfs_init
[    4.372375] of_cfs_init: OKsystemd-sysv-generator[241]: SysV service '/etc/init.d/rng-tools' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.375311189789] cfg80211systemd-sysv-generator[241]: LoadingSysV compiled-in X.509 certificates for regulatory database
[    4.375761] mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA 64-bit
[    4.377136] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA 64-bitservice '/etc/init.d/reboot' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.405881213694] random: fast init done
[    4.415654] mmc1: Problem switching card into high-speed mode!
[    4.422060] mmc1: new SDHC card at address 0001
[    4.426990] mmcblk1: mmc1:0001 SD16G 14.5 GiBsystemd-sysv-generator[241]: SysV service '/etc/init.d/single' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.433053238167]  mmcblk1: p1 p2
[    4.460338] mmc0: new high speed MMC card at address 0001
[    4.466107] mmcblk0: mmc0:0001 Q2J54A 3.59 GiB
[    4.470828] mmcblk0boot0: mmc0:0001 Q2J54A partition 1 16.0 MiBsystemd-sysv-generator[241]: SysV service '/etc/init.d/nfsserver' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.475750263637] usb 1-1systemd-sysv-generator[241]: newSysV high-speed USB device number 2 using xhci-hcd
[    4.476942] mmcblk0boot1: mmc0:0001 Q2J54A partition 2 16.0 MiB
[    4.489238] mmcblk0rpmb: mmc0:0001 Q2J54A partition 3 512 KiB, chardev (244:0)
[    4.533201] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'service '/etc/init.d/inetd.busybox' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.539740288027] clk: Not disabling unused clocks
[    4.544245] ALSA device list:
[    4.547198]   #0: DisplayPort monitor
[    4.551148] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2systemd-sysv-generator[241]: SysV service '/etc/init.d/watchdog-init' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.559766313156] cfg80211: failed to load regulatory.db
[    4.610492] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[    4.618618] VFS: Mounted root (ext4 filesystem) on device 179:2systemd-sysv-generator[241]: SysV service '/etc/init.d/sshd' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.626014337651] devtmpfs: mounted
[    4.629660] Freeing unused kernel memory: 2112K
[    4.634256] Run /sbin/init as init process
[    4.643978] usb 1-1: New USB device found, idVendor=04b4, idProduct=650a, bcdDevice=50.00systemd-sysv-generator[241]: SysV service '/etc/init.d/nfscommon' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    45.652158817681] usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0systemd[1]: Queued start job for default target Graphical Interface.
[    45.705353825937] hub 1-1:1.0: USB hub foundrandom: systemd: uninitialized urandom read (16 bytes read)
[    45.709133862478] hub 1-1:1.0: 4 ports detected
[    4.771785] usb 2-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcdsystemd[1]: Created slice Slice /system/getty.
[  OK  ] Created slice Slice /system/getty.
[    5.884747] random: systemd: uninitialized urandom read (16 bytes read)
[    45.795998892675] usb 2-1: New USB device found, idVendor=04b4, idProduct=6508, bcdDevice=50.00systemd[1]: Created slice Slice /system/modprobe.
[  OK  ] Created slice Slice /system/modprobe.
[    45.804172912722] usb 2-1random: systemd: Newuninitialized USBurandom deviceread strings: Mfr=0, Product=0, SerialNumber=0(16 bytes read)
[    45.865323920557] hub 2-1:1.0: USB hub foundsystemd[1]: Created slice Slice /system/serial-getty.
[  OK  4.869239] Created hub 2-1:1.0: 4 ports detected
INIT: version 2.97 booting
[    5.055762] usb 1-1.4: new high-speed USB device number 3 using xhci-hcdslice Slice /system/serial-getty.
[    5.941760] systemd[1]: Created slice User and Session Slice.
[  OK  ] Created slice User and Session Slice.
[    5.161015964897] usb 1-1.4: New USB device found, idVendor=05e3, idProduct=0610, bcdDevice=32.98systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[  OK  5.169373] usb 1-1.4: New USB device strings: Mfr=0, Product=1, SerialNumber=0Started Dispatch Password …ts to Console Directory Watch.
[    5.176676988831] usb 1-1.4systemd[1]: Product: USB2.0 Hub
[    5.217526] hub 1-1.4:1.0: USB hub found
[    5.221727] hub 1-1.4:1.0: 4 ports detectedStarted Forward Password Requests to Wall Directory Watch.
[  OK  ] Started Forward Password R…uests to Wall Directory Watch.
[    56.571894012901] usb 1-1.4.1: new low-speed USB device number 4 using xhci-hcd
Starting udevsystemd[1]: Reached target Path Units.
[  OK  ] Reached target Path Units.
[    56.704381028734] usb 1-1.4.1systemd[1]: NewReached USBtarget deviceRemote found, idVendor=04d9, idProduct=0006, bcdDevice= 1.10File Systems.
[  OK  5.712918] usb 1-1.4.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0Reached target Remote File Systems.
[    56.720401048714] usb 1-1.4.1: Product: RPI Wired Keyboard 1systemd[1]: Reached target Slice Units.
[  OK  5.725537] usb 1-1.4.1: Manufacturer:Reached target Slice Units.
[    56.837039064739] inputsystemd[1]: Reached  RPI Wired Keyboard 1 as /devices/platform/axi/ff9d0000.usb0/fe200000.dwc3/xhci-hcd.1.auto/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/0003:04D9:0006.0001/input/input0target Swaps.
[  OK  ] Reached target Swaps.
[    56.899370089507] udevdsystemd[2741]: starting version 3.2.9 Listening on RPCbind Server Activation Socket.
[  OK  5.912114] hid-generic 0003:04D9:0006.0001: input: USB HID v1.11 Keyboard Listening on RPCbind Server Activation Socket.
[  RPI Wired Keyboard 6.112727] systemd[1] on usb-xhci-hcd.1.auto-1.4.1/input0: Reached target RPC Port Mapper.
[  OK  5.934742] input:Reached target RPC RPI Wired Keyboard 1 as /devices/platform/axi/ff9d0000.usb0/fe200000.dwc3/xhci-hcd.1.auto/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.1/0003:04D9:0006.0002/input/input1
[    5.949634] random: udevd: uninitialized urandom read (16 bytes read)Port Mapper.
[    6.135682] systemd[1]: Listening on Syslog Socket.
[  OK  ] Listening on Syslog Socket.
[    56.958250152862] randomsystemd[1]: udevd:Listening uninitializedon urandominitctl readCompatibility (16 bytes read)Named Pipe.
[  OK  5.964724] random:Listening udevd:on uninitializedinitctl urandomCompatibility read (16 bytes read)Named Pipe.
[    6.007926177198] hid-generic 0003:04D9:0006.0002: input: USB HID v1.11 Device [  RPI Wired Keyboard 1] on usb-xhci-hcd.1.auto-1.4.1/input1systemd[1]: Listening on Journal Audit Socket.
[  OK  ] Listening on Journal Audit Socket.
[    6.066657196939] udevdsystemd[2751]: starting eudev-3.2.9 Listening on Journal Socket (/dev/log).
[  OK  6.099768] usb 1-1.4.4: new low-speed USB device number 5 using xhci-hcd
[    6.208393] usb 1-1.4.4: New USB device found, idVendor=0458, idProduct=0186, bcdDevice=24.58Listening on Journal Socket (/dev/log).
[    6.217006] systemd[1]: Listening on Journal Socket.
[  OK  ] Listening on Journal Socket.
[    6.216941233190] usb 1-1.4.4systemd[1]: NewListening USBon deviceNetwork strings: Mfr=4, Product=40, SerialNumber=0Service Netlink Socket.
[  OK  6.224530] Listening usb 1-1.4.4: Product: Wired Mouseon Network Service Netlink Socket.
[    6.228891257063] usb 1-1.4.4: Manufacturer: KYE SYSTEMS CORPsystemd[1]: Listening on udev Control Socket.
[  OK  ] Listening on udev Control Socket.
[    6.276321276929] input: KYE SYSTEMS CORP. Wired Mouse as /devices/platform/axi/ff9d0000.usb0/fe200000.dwc3/xhci-hcd.1.auto/usb1/1-1/1-1.4/1-1.4.4/1-1.4.4:1.0/0003:0458:0186.0003/input/input2
[    6.311902] hid-generic 0003:0458:0186.0003: input: USB HID v1.11 Mouse [KYE SYSTEMS CORP. Wired Mouse] on usb-xhci-hcd.1.auto-1.4.4/input0
[    6.324773] usbhid 1-1.4.4:1.1: couldn't find an input interrupt endpoint
[    6.429812] zocl: loading out-of-tree module taints kernel.
[    6.439670] [drm] Probing for xlnx,zocl
[    6.443799] zocl-drm a0000000.zyxclmm_drm: IRQ index 32 not found
[    6.450112] [drm] FPGA programming device pcap founded.
[    6.455374] [drm] PR Isolation addr 0x0
[    6.479965] [drm] Initialized zocl 0.0.0 00000 for a0000000.zyxclmm_drm on minor 1
[    6.495932] [drm] Probing for xlnx,zocl
[    6.500159] zocl-drm amba_pl@0:zyxclmm_drm: IRQ index 32 not found
[    6.506530] [drm] FPGA programming device pcap founded.
[    6.511783] [drm] PR Isolation addr 0x0
[    6.512850] [drm] Initialized zocl 0.0.0 00000 for amba_pl@0:zyxclmm_drm on minor 2
[    7.803891] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
bootlogd: /dev/ttyPS0Fri Mar  9 12:34:56 UTC 2018
Configuring packages on first boot....
 (This may take several minutes. Please do not power off the machine.)
Running postinst /etc/rpm-postinsts/100-libmali-xlnx...
Running postinst /etc/rpm-postinsts/101-zocl...
[   11.326428] zocl-drm a0000000.zyxclmm_drm: IRQ index 32 not found
[   11.333461] zocl-drm amba_pl@0:zyxclmm_drm: IRQ index 32 not found
Running postinst /etc/rpm-postinsts/102-sysvinit-inittab...
Running postinst /etc/rpm-postinsts/103-xrt...
update-rc.d: /etc/init.d/run-postinsts exists during rc.d purge (continuing)
 Removing any system startup links for run-postinsts ...
  /etc/rcS.d/S99run-postinsts
INIT: Entering runlevel: 5
Configuring network interfaces... udhcpc: started, v1.32.0
udhcpc: sending discover
udhcpc: sending discover
udhcpc: sending discover
udhcpc: sending select for 192.168.13.95
udhcpc: lease of 192.168.13.95 obtained, lease time 3600
/etc/udhcpc.d/50default: Adding DNS 147.231.12.1
/etc/udhcpc.d/50default: Adding DNS 147.231.10.9
/etc/udhcpc.d/50default: Adding DNS 8.8.8.8
done.
Starting system message bus: dbus.
Starting random number generator daemon.
Starting haveged: haveged: command socket is listening at fd 3
haveged: haveged starting up


haveged: haveged: ver: 1.9.13; arch: generic; vend: ; build: (gcc 10.2.0 CTV); collect: 128K

haveged: haveged: cpu: (VC); data: 16K (D); inst: 16K (D); idx: 11/40; sz: 15456/64452

haveged: haveged: tot tests(BA8): A:1/1 B:1/1 continuous tests(B):  last entropy estimate 8.0008

haveged: haveged: fills: 0, generated: 0

Starting OpenBSD Secure Shell server: sshd
  generating ssh RSA host key...
  generating ssh ECDSA host key...
  generating ssh ED25519 host key...
done.
Starting Xserver
Starting rpcbind daemon...
done.
starting statd:
X.Org X Server 1.20.9
X Protocol Version 11, Revision 0
Build Operating System: Linux
Current Operating System: Linux petalinux 5.10.0-xilinx-v2022.2 #1 SMP Tue Oct 12 09:30:57 UTC 2021 aarch64
Kernel command line: earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait cma=512M
Build Date: 25 August 2020  03:40:19PM

Current version of pixman: 0.40.0
        Before reporting problems, check http://wiki.x.org
        to make sure that you have the latest version.
Markers: (--) probed, (**) from config file, (==) default setting,
        (++) from command line, (!!) notice, (II) informational,
        (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
(==) Log file: "/var/log/Xorg.0.log", Time: Fri Mar  9 12:35:23 2018
(==) Using config file: "/etc/X11/xorg.conf"
(==) Using system config directory "/usr/share/X11/xorg.conf.d"
done
starting Busybox HTTP Daemon: httpd... done.
Starting internet superserver: inetd.
NFS daemon support not enabled in kernel
Init Start
Run init.sh from SD card
Load SD Init Script
User bash Code can be insered here and put init.sh on SD
Init End
Starting syslogd/klogd: done
Starting internet superserver: xinetd.
Starting watchdog daemon...done
Starting tcf-agent: OK
D-BUS per-session daemon address is: unix:abstract=/tmp/dbus-uZ0pAaPepw,guid=6af8f307990e2343ab4cc7765aa27f8c

PetaLinux 2022.2 petalinux ttyPS0


root@petalinux:~# matchbox: Cant find a keycode for keysym 269025056
matchbox: ignoring key shortcut XF86Calendar=!$contacts

matchbox: Cant find a keycode for keysym 2809
matchbox: ignoring key shortcut telephone=!$dates

matchbox: Cant find a keycode for keysym 269025050
matchbox: ignoring key shortcut XF86Start=!matchbox-remote -desktop

[settings daemon] Forking. run with -n to prevent fork
dbus-daemon[1124]: Activating service name='org.a11y.atspi.Registry' requested by ':1.0' (uid=0 pid=1117 comm="matchbox-panel --start-applets showdesktop,windows")
dbus-daemon[1124]: Successfully activated service 'org.a11y.atspi.Registry'
SpiRegistry daemon is running with well-known name - org.a11y.atspi.Registry

** (matchbox-desktop:1116): WARNING **: 12:35:29.103: Error loading icon: Icon 'terminal' not present in theme Sato

root@petalinux:~# ifconfig
eth0      Link encap:Ethernet  HWaddr 54:10:EC:65:33:F6
          inet addr:192.168.13.95  Bcast:192.168.13.255  Mask:255.255.255.0
          inet6 addr: fe80::5610:ecff:fe65:33f6/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:2 errors:0 dropped:0 overruns:0 frame:0
          TX packets:23 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:658 (658.0 B)  TX bytes:4070 (3.9 KiB)
          Interrupt:39

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:2 errors:0 dropped:0 overruns:0 frame:0
          TX packets:2 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:140 (140.0 B)  TX bytes:140 (140.0 B)

root@petalinux:~# cd /media/sd-mmcblk1p1
root@petalinux:/media/sd-mmcblk1p1# ./test_vadd krnl_vadd.xclbin
INFO: Reading krnl_vadd.xclbin
Loading: 'krnl_vadd.xclbin'
Trying to program device[0]: edge
Device[0]: program successful!
TEST PASSED
root@petalinux:/media/sd-mmcblk1p1#
root@petalinux:/media/sd-mmcblk1p1# halt

INIT: Sending processes configured via /etc/inittab the TERM signal
root@petalinux:/media/sd-mmcblk1p1# Stopping haveged:

Stopping OpenBSD Secure Shell server: sshdstopped /usr/sbin/sshd (pid 973)
.
stopping Busybox HTTP Daemon: httpd... stopped httpd (pid 1001)
done.
Stopping system message bus: dbus.
Stopping internet superserver: inetd.
stopping mountd: done
stopping nfsd: done
 Stop.
Stopping syslogd/klogd: stopped syslogd (pid 1016)
stopped klogd (pid 1019)
done
Stopping tcf-agent: OK
Stopping internet superserver: xinetd.
Stopping XServer
xinit: connection to X server lost

waiting for X server to shut down dbus-daemon[1124]: Reloaded configuration
(II) Server terminated successfully (0). Closing log file.

xinit: unexpected signal 15
stopping statd: done
Stopping random number generator daemon.
Stopping rpcbind daemon...
done.
Stopping S.M.A.R.T. daemon: smartd.
Deconfiguring network interfaces... done.
Stopping watchdog daemon...Sending all processes the TERM signal...
logout
Sending all processes the KILL signal...
Unmounting remote filesystems...
Deactivating swap...
Unmounting local filesystems...
[  187.813113] reboot: Power downsystemd[1]: Listening on udev Kernel Socket.
[  OK  ] Listening on udev Kernel Socket.
[    6.296948] systemd[1]: Listening on User Database Manager Socket.
[  OK  ] Listening on User Database Manager Socket.
[    6.323278] systemd[1]: Mounting Huge Pages File System...
         Mounting Huge Pages File System...
[    6.343318] systemd[1]: Mounting POSIX Message Queue File System...
         Mounting POSIX Message Queue File System...
[    6.367401] systemd[1]: Mounting Kernel Debug File System...
         Mounting Kernel Debug File System...
[    6.385052] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
[    6.397304] systemd[1]: Mounting Temporary Directory /tmp...
         Mounting Temporary Directory /tmp...
[    6.414111] systemd[1]: Condition check resulted in Create List of Static Device Nodes being skipped.
[    6.426398] systemd[1]: Starting Load Kernel Module configfs...
         Starting Load Kernel Module configfs...
[    6.447915] systemd[1]: Starting Load Kernel Module drm...
         Starting Load Kernel Module drm...
[    6.467731] systemd[1]: Starting Load Kernel Module fuse...
         Starting Load Kernel Module fuse...
[    6.487791] systemd[1]: Starting RPC Bind...
         Starting RPC Bind...
[    6.500833] systemd[1]: Condition check resulted in File System Check on Root Device being skipped.
[    6.540171] systemd[1]: Starting Load Kernel Modules...
         Starting Load Kernel Modules...
[    6.559571] systemd[1]: Starting Remount Root and Kernel File Systems...
[    6.563773] dmaproxy: loading out-of-tree module taints kernel.
         Starting Remount Root and Kernel File Systems    6.573840] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null). Quota mode: none.
0m...
[    6.599729] systemd[1]: Starting Coldplug All udev Devices...
         Starting Coldplug All udev Devices...
[    6.622603] systemd[1]: Started RPC Bind.
[  OK  ] Started RPC Bind.
[    6.637078] systemd[1]: Mounted Huge Pages File System.
[  OK  ] Mounted Huge Pages File System.
[    6.657003] systemd[1]: Mounted POSIX Message Queue File System.
[  OK  ] Mounted POSIX Message Queue File System.
[    6.681041] systemd[1]: Mounted Kernel Debug File System.
[  OK  ] Mounted Kernel Debug File System.
[    6.701131] systemd[1]: Mounted Temporary Directory /tmp.
[  OK  ] Mounted Temporary Directory /tmp.
[    6.721581] systemd[1]: modprobe@configfs.service: Deactivated successfully.
[    6.729934] systemd[1]: Finished Load Kernel Module configfs.
[  OK  ] Finished Load Kernel Module configfs.
[    6.753627] systemd[1]: modprobe@drm.service: Deactivated successfully.
[    6.761491] systemd[1]: Finished Load Kernel Module drm.
[  OK  ] Finished Load Kernel Module drm.
[    6.785682] systemd[1]: modprobe@fuse.service: Deactivated successfully.
[    6.793848] systemd[1]: Finished Load Kernel Module fuse.
[  OK  ] Finished Load Kernel Module fuse.
[    6.818376] systemd[1]: Finished Load Kernel Modules.
[  OK  ] Finished Load Kernel Modules.
[    6.834113] systemd[1]: Finished Remount Root and Kernel File Systems.
[  OK  ] Finished Remount Root and Kernel File Systems.
[    6.861525] systemd[1]: Mounting NFSD configuration filesystem...
         Mounting NFSD configuration filesystem...
[    6.877185] systemd[1]: Condition check resulted in FUSE Control File System being skipped.
[    6.888570] systemd[1]: Mounting Kernel Configuration File System...
         Mounting Kernel Configuration File System...
[    6.914640] systemd[1]: Condition check resulted in Rebuild Hardware Database being skipped.
[    6.923266] systemd[1]: Condition check resulted in Platform Persistent Storage Archival being skipped.
[    6.935773] systemd[1]: Starting Apply Kernel Variables...
         Starting Apply Kernel Variables...
[    6.952975] systemd[1]: Condition check resulted in Create System Users being skipped.
         Starting Create Static Device Nodes in /dev...
[    6.984846] systemd[1]: Failed to mount NFSD configuration filesystem.
[FAILED] Failed to mount NFSD configuration filesystem.
See 'systemctl status proc-fs-nfsd.mount' for details.
[DEPEND] Dependency failed for NFS Mount Daemon.
[DEPEND] Dependency failed for NFS server and services.
[  OK  ] Mounted Kernel Configuration File System.
[  OK  ] Finished Apply Kernel Variables.
[  OK  ] Finished Create Static Device Nodes in /dev.
[  OK  ] Reached target Preparation for Local File Systems.
         Mounting /var/volatile...
[  OK  ] Started Entropy Daemon based on the HAVEGE algorithm.
         Starting Journal Service...
         Starting Rule-based Manage…for Device Events and Files...
[  OK  ] Mounted /var/volatile.
[  OK  ] Finished Coldplug All udev Devices.
         Starting Wait for udev To …plete Device Initialization...
         Starting Load/Save Random Seed...
[  OK  ] Reached target Local File Systems.
[  OK  ] Started Journal Service.
         Starting Flush Journal to Persistent Storage...
[  OK  ] Finished Flush Journal to Persistent Storage.
         Starting Create Volatile Files and Directories...
[  OK  ] Finished Create Volatile Files and Directories.
[  OK  ] Started Rule-based Manager for Device Events and Files.
         Starting Network Time Synchronization...
         Starting Record System Boot/Shutdown in UTMP...
[  OK  ] Finished Record System Boot/Shutdown in UTMP.
[    7.757431] zocl-drm amba_pl@0:zyxclmm_drm: IRQ index 32 not found
[  OK  ] Started Network Time Synchronization.
[  OK  ] Reached target System Time Set.
[  OK  ] Listening on Load/Save RF …itch Status /dev/rfkill Watch.
[  OK  ] Finished Load/Save Random Seed.
[  OK  ] Finished Wait for udev To Complete Device Initialization.
[  OK  ] Created slice Slice /system/systemd-fsck.
[  OK  ] Started Hardware RNG Entropy Gatherer Daemon.
[  OK  ] Reached target System Initialization.
[  OK  ] Started Daily Cleanup of Temporary Directories.
[  OK  ] Reached target Timer Units.
[  OK  ] Listening on D-Bus System Message Bus Socket.
         Starting sshd.socket...
         Starting File System Check on /dev/mmcblk1p1...
[  OK  ] Listening on sshd.socket.
[  OK  ] Finished File System Check on /dev/mmcblk1p1.
[  OK  ] Reached target Socket Units.
[  OK  ] Reached target Basic System.
         Mounting /run/media/mmcblk1p1...
[  OK  ] Started Kernel Logging Service.
[  OK  ] Started System Logging Service.
[  OK  ] Started D-Bus System Message Bus.
         Starting IPv6 Packet Filtering Framework...
         Starting IPv4 Packet Filtering Framework...
         Starting rng-tools.service...
         Starting Resets System Activity Logs...
         Starting User Login Management...
[  OK  ] Started Xserver startup without a display manager.
         Starting OpenSSH Key Generation...
[  OK  ] Finished IPv6 Packet Filtering Framework.
[  OK  ] Finished IPv4 Packet Filtering Framework.
[  OK  ] Started rng-tools.service.
[  OK  ] Finished Resets System Activity Logs.
[  OK  ] Reached target Preparation for Network.
         Starting LSB: NFS support for both client and server...
         Starting Network Configuration...
[  OK  ] Mounted /run/media/mmcblk1p1.
[  OK  ] Finished OpenSSH Key Generation.
[  OK  ] Started LSB: NFS support for both client and server.
         Starting busybox-httpd.service...
         Starting inetd.busybox.service...
         Starting LSB: Kernel NFS server support...
[  OK  ] Started busybox-httpd.service.
[  OK  ] Started inetd.busybox.service.
[FAILED] Failed to start LSB: Kernel NFS server support.
See 'systemctl status nfsserver.service' for details.
[  OK  ] Started User Login Management.
[  OK  ] Started Network Configuration.
         Starting Network Name Resolution...
[  OK  ] Started Network Name Resolution.
[  OK  ] Reached target Network.
[  OK  ] Reached target Host and Network Name Lookups.
[  OK  ] Started NFS status monitor for NFSv2/3 locking..
         Starting Permit User Sessions...
         Starting Target Communication Framework agent...
[  OK  ] Started Xinetd A Powerful Replacement For Inetd.
[  OK  ] Finished Permit User Sessions.
[  OK  ] Started Getty on tty1.
[  OK  ] Started Serial Getty on ttyPS0.
[  OK  ] Reached target Login Prompts.
[  OK  ] Started Target Communication Framework agent.
[  OK  ] Reached target Multi-User System.
[  OK  ] Reached target Graphical Interface.
         Starting Record Runlevel Change in UTMP...
[  OK  ] Finished Record Runlevel Change in UTMP.

PetaLinux 2022.2_release_S10071807 trenz ttyPS0

trenz login: root (automatic login)

Init Start
Run init.sh from SD card
Load SD Init Script
User bash Code can be insered here and put init.sh on SD
Init End
root@trenz:~# cd /run/media/mmcblk1p1/
root@trenz:/run/media/mmcblk1p1# ./test_vadd krnl_vadd.xclbin
INFO: Reading krnl_vadd.xclbin
Loading: 'krnl_vadd.xclbin'
Trying to program device[0]: edge
Device[0]: program successful!
TEST PASSED
root@trenz:/run/media/mmcblk1p1# ifconfig
eth0      Link encap:Ethernet  HWaddr 68:27:19:A7:6E:CA
          inet addr:192.168.13.184  Bcast:192.168.13.255  Mask:255.255.255.0
          inet6 addr: fe80::6a27:19ff:fea7:6eca/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:80 errors:0 dropped:0 overruns:0 frame:0
          TX packets:53 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:13303 (12.9 KiB)  TX bytes:8950 (8.7 KiB)
          Interrupt:38

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:106 errors:0 dropped:0 overruns:0 frame:0
          TX packets:106 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:7680 (7.5 KiB)  TX bytes:7680 (7.5 KiB)

root@trenz:/run/media/mmcblk1p1# halt
         Stopping Session c1 of User root...
[  OK  ] Removed slice Slice /system/modprobe.
[  OK  ] Stopped target Graphical Interface.
[  OK  ] Stopped target Multi-User System.
[  OK  ] Stopped target Login Prompts.
[  OK  ] Stopped target Host and Network Name Lookups.
[  OK  ] Stopped target System Time Set.
[  OK  ] Stopped target Timer Units.
[  OK  ] Stopped Daily Cleanup of Temporary Directories.
[  OK  ] Closed Load/Save RF Kill Switch Status /dev/rfkill Watch.
         Stopping busybox-httpd.service...
         Stopping Kernel Logging Service...
         Stopping System Logging Service...
         Stopping Getty on tty1...
         Stopping inetd.busybox.service...
         Stopping Serial Getty on ttyPS0...
[  OK  ] Stopped Resets System Activity Logs.
         Stopping Load/Save Random Seed...
         Stopping Target Communication Framework agent...
         Stopping Xinetd A Powerful Replacement For Inetd...
[  OK  ] Stopped OpenSSH Key Generation.
[  OK  ] Stopped Kernel Logging Service.
[  OK  ] Stopped System Logging Service.
[  OK  ] Stopped Xinetd A Powerful Replacement For Inetd.
[  OK  ] Stopped Serial Getty on ttyPS0.
[  OK  ] Stopped Target Communication Framework agent.
[  OK  ] Stopped Getty on tty1.
[  OK  ] Stopped busybox-httpd.service.
[  OK  ] Stopped inetd.busybox.service.
[  OK  ] Stopped Load/Save Random Seed.
[  OK  ] Stopped Session c1 of User root.
[  OK  ] Removed slice Slice /system/getty.
[  OK  ] Removed slice Slice /system/serial-getty.
         Stopping LSB: NFS support for both client and server...
         Stopping User Login Management...
         Stopping User Manager for UID 0...
[  OK  ] Stopped LSB: NFS support for both client and server.
[  OK  ] Stopped User Manager for UID 0.
[  OK  ] Stopped target RPC Port Mapper.
         Stopping rng-tools.service...
         Stopping User Runtime Directory /run/user/0...
[  OK  ] Unmounted /run/user/0.
[  OK  ] Stopped Hardware RNG Entropy Gatherer Daemon.
[  OK  ] Stopped User Login Management.
[  OK  ] Stopped rng-tools.service.
[  OK  ] Stopped User Runtime Directory /run/user/0.
[  OK  ] Removed slice User Slice of UID 0.
         Stopping D-Bus System Message Bus...
         Stopping Permit User Sessions...
[  OK  ] Stopped D-Bus System Message Bus.
[  OK  ] Stopped Permit User Sessions.
[  OK  ] Stopped target Network.
[  OK  ] Stopped target Remote File Systems.
         Stopping Network Name Resolution...
[  OK  ] Stopped Network Name Resolution.
         Stopping Network Configuration...
[  OK  ] Stopped Network Configuration.
[  OK  ] Stopped target Preparation for Network.
[  OK  ] Stopped IPv6 Packet Filtering Framework.
[  OK  ] Stopped IPv4 Packet Filtering Framework.
[  OK  ] Stopped target Basic System.
[  OK  ] Stopped target Path Units.
[  OK  ] Stopped Dispatch Password …ts to Console Directory Watch.
[  OK  ] Stopped Forward Password R…uests to Wall Directory Watch.
[  OK  ] Stopped target Slice Units.
[  OK  ] Removed slice User and Session Slice.
[  OK  ] Stopped target Socket Units.
[  OK  ] Closed D-Bus System Message Bus Socket.
[  OK  ] Closed sshd.socket.
[  OK  ] Stopped target System Initialization.
[  OK  ] Closed Syslog Socket.
[  OK  ] Closed Network Service Netlink Socket.
[  OK  ] Stopped Apply Kernel Variables.
[  OK  ] Stopped Load Kernel Modules.
         Stopping Network Time Synchronization...
         Stopping Record System Boot/Shutdown in UTMP...
[  OK  ] Stopped Network Time Synchronization.
[  OK  ] Stopped Record System Boot/Shutdown in UTMP.
[  OK  ] Stopped Create Volatile Files and Directories.
[  OK  ] Stopped target Local File Systems.
         Unmounting /run/media/mmcblk1p1...
         Unmounting Temporary Directory /tmp...
         Unmounting /var/volatile...
[  OK  ] Unmounted /run/media/mmcblk1p1.
[  OK  ] Unmounted Temporary Directory /tmp.
[  OK  ] Unmounted /var/volatile.
[  OK  ] Stopped target Swaps.
[  OK  ] Reached target Unmount All Filesystems.
[  OK  ] Stopped File System Check on /dev/mmcblk1p1.
[  OK  ] Removed slice Slice /system/systemd-fsck.
[  OK  ] Stopped target Preparation for Local File Systems.
[  OK  ] Stopped Remount Root and Kernel File Systems.
[  OK  ] Stopped Create Static Device Nodes in /dev.
[  OK  ] Reached target System Shutdown.
[  OK  ] Reached target Late Shutdown Services.
         Starting System Halt...
[  317.764371] reboot: System halted
  1. Petalinux boot,
  2. ifconfig to find assigned Ethernet address,
  3. test_vadd example executed to test the kernel execution,
  4. halt to proper terminate OS.

Test 3: Vitis-AI Demo

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This test implements simple AI demo to verify DPU integration to our custom extensible platform. This tutorial follows Xilix Vitis Tutorial for zcu104 with necessary fixes and customizations required for our case.

Create and Build Vitis Design

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Create new directory test_board_dpu_trd  to test Vitis extendable flow example “dpu trd”
~/work/te0820_84_240/test_board_dpu_trd

Current directory structure:
~/work/te0820_84_240/test_board
~/work/te0820_84_240/test_board_pfm
~/work/te0820_84_240/test_board_test_vadd
~/work/te0820_84_240/test_board_dpu_trd

Change working directory:

Code Block
languagebash
$cd ~/work/te0820_84_240/test_board_dpu_trd

In Ubuntu terminal, start Vitis by:

Code Block
languagebash
$ vitis &

In Vitis IDE Launcher, select your working directory
~/work/te0820_84_240/test_board_dpu_trd
Click on Launch to start Vitis.

Add Vitis-AI Repository to Vitis
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Open menu Window → Preferences

Go to Library Repository tab

Add Vitis-AI by clicking Add button and fill the form as shown below, use absolute path to your home folder in field "Location":

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Click Apply and Close.

Info

Field "Location" says that the Vitis-AI repository from github has been cloned into ~/vitis_ai_2_0 folder, already in the stage of Petalinux configuration. It is the same Vitis-AI 2.0 package downloaded from the branch 2.0. Use the absolute path to your home directory. It depends on the user name. The user name in the figure is "devel". Replace it by your user name.

Correctly added library appears in Libraries:

Open menu Xilinx → Libraries...

You can find there just added Vitis-AI library marked as "Installed".

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Create a Vitis-AI Design for our te0820_84_240 custom platform
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Select File -> New -> Application project. Click Next.

Skip welcome page if it is shown.

Click on “+ Add” icon and select the custom extensible platform te0820_84_240_pfm[custom] in the directory:
~/work/te0820_84_240/test_board_pfm/te0820_84_240_pfm/export/te0820_84_240_pfm

We can see available PL clocks and frequencies.

Note
PL4 with 240 MHz clock is has been set as default in the platform creation process.


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Click Next.
In “Application Project Details” window type into Application project name: dpu_trd
Click Next.
In “Domain window” type (or select by browse):
“Sysroot path”:
~/work/te0820_84_240/test_board_pfm/sysroots/cortexa72-cortexa53-xilinx-linux
“Root FS”:
~/work/te0820_84_240/test_board/os/petalinux/images/linux/rootfs.ext4
“Kernel Image”:
~/work/te0820_84_240/test_board/os/petalinux/images/linux/Image
Click Next.

In “Templates window”, if not done before, update “Vitis IDE Examples” and “Vitis IDE Libraries”.

In “Find”, type: “dpu” to search for the “DPU Kernel (RTL Kernel)” example.

Select: “DPU Kernel (RTL Kernel)”

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 Click Finish
New project template is created.

In dpu_trd window menu “Active build configuration” switch from “SW Emulation” to “Hardware”.

Info
File dpu_conf.vh located at dpu_trd_kernels/src/prj/Vitis directory contains DPU configuration.

Open file dpu_conf.vh and change in line 37:

`define URAM_DISABLE 

to 

`define URAM_ENABLE 

and save modified file.

This modification is necessary for succsessfull implementation of the DPU on the zcu04-ev module with internal memories implemented in URAMs.

Go to dpu_trd_system_hw_link and double click on dpu_trd_system_hw_link.prj.

Remove sfm_xrt_top kernel from binary container by right clicking on it and choosing remove.

Reduce number of DPU kernels to one.

Configure connection of DPU kernels
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On the same tab right click on dpu and choose Edit V++ Options 

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Click "..." button on the line of V++ Configuration Settings and modify configuration as follows:

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[clock]
freqHz=200000000:DPUCZDX8G_1.aclk
freqHz=400000000:DPUCZDX8G_1.ap_clk_2

[connectivity]
sp=DPUCZDX8G_1.M_AXI_GP0:HPC0
sp=DPUCZDX8G_1.M_AXI_HP0:HP0
sp=DPUCZDX8G_1.M_AXI_HP2:HP1
Update packaging to add dependencies into SD Card
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Create a new folder img in your project in dpu_trd/src/app

Download image from provided link and place it to newly created folder dpu_trd/src/app/img.

Double click dpu_trd_system.sprj

Click "..." button on Packaging options

Enter "--package.sd_dir=../../dpu_trd/src/app"

Click OK.

Build DPU_TRD application
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In “Explorer” section of Vitis IDE, click on:  dpu_trd_system[te0820_84_240_pfm] to select it.

Right Click on:  dpu_trd_system[te0820_84_240_pfm] and select in the opened sub-menu:
Build project

Run DPU_TRD on Board
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Write sd_card.img to SD card using SD card reader.

The sd_card.img file is output of the compilation and packing by Vitis. It is located in directory:
~/work/te0820_84_240/test_board_dpu_trd/dpu_trd_system/Hardware/package/

Note
In Windows Pro 10 (or Windows 11 Pro) PC, inst all program Win32DiskImager  for this task. Win32 Disk Imager can write raw disk image to removable devices.
https://win32diskimager.org/

Boot the board and open terminal on the board either by connecting serial console connection, or by opening ethernet connection to ssh server on the board, or by opening terminal directly using window manager on board. Continue using the embedded board terminal.

Info

Detailed guide how to run embedded board and connect to it can be found in Run Compiled Example Application for Vector Addition.

Check ext4 partition size by:

Code Block
languagebash
root@petalinux:~# cd /
root@petalinux:~# df .
Filesystem           1K-blocks      Used Available Use% Mounted on
/dev/root               564048    398340    122364  77% /

Resize partition

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root@petalinux:~# resize-part /dev/mmcblk1p2
/dev/mmcblk1p2
Warning: Partition /dev/mmcblk1p2 is being used. Are you sure you want to continue?
parted: invalid token: 100%
Yes/No? yes
End?  [2147MB]? 100%
Information: You may need to update /etc/fstab.

resize2fs 1.45.3 (14-Jul-2019)
Filesystem at /dev/mmcblk1p2 is mounted on /media/sd-mmcblk1p2; o[   72.751329] EXT4-fs (mmcblk1p2): resizing filesystem from 154804 to 1695488 blocks
n-line resizing required
old_desc_blocks = 1, new_desc_blocks = 1
[   75.325525] EXT4-fs (mmcblk1p2): resized filesystem to 1695488
The filesystem on /dev/mmcblk1p2 is now 1695488 (4k) blocks long.

Check ext4 partition size again, you should see:

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languagebash
root@petalinux:~# df . -h
Filesystem                Size      Used Available Use% Mounted on
/dev/root                 6.1G    390.8M      5.4G   7% /


Note
The available size would be different according to your SD card size.

Copy dependencies to home folder:

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languagebash
# Libraries
root@petalinux:~# cp -r /mnt/sd-mmcblk1p1/app/samples/ ~
# Model
root@petalinux:~# cp /mnt/sd-mmcblk1p1/app/model/resnet50.xmodel ~
# Host app
root@petalinux:~# cp /mnt/sd-mmcblk1p1/dpu_trd ~
# Images to test
root@petalinux:~# cp /mnt/sd-mmcblk1p1/app/img/*.JPEG ~

Run the application from /home/root folder and you can observe that "bell pepper" receives highest score.

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root@petalinux:~# env XLNX_VART_FIRMWARE=/mnt/sd-mmcblk1p1/dpu.xclbin ./dpu_trd bellpeppe-994958.JPEG
score[945]  =  0.992235     text: bell pepper,
score[941]  =  0.00315807   text: acorn squash,
score[943]  =  0.00191546   text: cucumber, cuke,
score[939]  =  0.000904801  text: zucchini, courgette,
score[949]  =  0.00054879   text: strawberry,


Note


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The TEBF0808 carrier with TE0820-02-04eg-1e-2gb module is running the PetaLinux OS and drives simple version of an X11 GUI on monitor with Display Port. Application dpu_trd performing ResNet50 on the DPU.

The resnet50 is trained for recognition of 1000 different objects. 

The test board application reads the input figure and call the DPU with 8bit coefficients of the ResNet50 network.

The "bell pepper" object is recognised with high probability.

On board compilation of Vitis AI 2.0 demo

The application dpu_trd can be recompiled directly on the test board.

Code Block
languagebash
chmod 777 ./build.sh
./build.sh
Opencv4                   OpenCV - Open Source Computer Vision Library
  
root@petalinux:~# env XLNX_VART_FIRMWARE=/mnt/sd-mmcblk1p1/dpu.xclbin ./a.out bellpeppe-994958.JPEG
score[945]  =  0.992235     text: bell pepper,
score[941]  =  0.00315807   text: acorn squash,
score[943]  =  0.00191546   text: cucumber, cuke,
score[939]  =  0.000904801  text: zucchini, courgette,
score[949]  =  0.00054879   text: strawberry,

The result of on compilation on test board is aplication a.out.

It provides identical results to the dpu_trd application compiled in Vitis in the PC Ubuntu Vitis AI environment.

Only the C++ SW part of the application can be compiled on the test board. The HW acceleration part (the dpu kernel)
has to be compiled in Ubuntu Vitis AI 2.0 framework (with Vivado).

Additional Vitis AI 2.0 demos

Many additional demos from the Vitis AI 2.0 library can be compiled on the test board and executed on the test board with identical dpu.

Vitis AI 2.0 demos work in several modes:

  • From a image stored in a file with output in form of text to console or image displayed on the X11 desktop.
  • From sequence of image stored in several files with output in form of text to console or images displayed on the X11 deskto
  • From USB 2/3 www camera input  video with output in form video displayed on the X11 remote desktop.

Use of USB 2/3 www camera input  video requires the test board te0706-03 for correct recognition of the USB www camera.  

Starting point for exploration of these Vitis AI 2.0 examples is this Xilinx www page.

Vitis AI 2.0 is Here! (xilinx.com)

TE0820 modules with smaller programmable logic area without URAMs (all xzcu2 and zxcu3 modules ) with 2GB of DDR4 are supported only for the extensible flow applications like the test_vadd demo.

Starting point for exploration of Vitis acceleration flow is Vitis Accel Examples' Repository (project templates are already downloaded in Vitis):

GitHub - Xilinx/Vitis_Accel_Examples at 2022.2


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decide free what's the best why to describe changes from standard reference design to get Vitis AI design.

→ Maybe add TCL code blox which automatically change the standard design?

In case you has any question, let me know.



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App. A: Change History and Legal Notices

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Document Change History

To get content of older revision go to "Change History" of this page and select older document revision number.

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following

    • Add new row below first

    • Copy "Page Information Macro (date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


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