Page History

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Impact: Power supply selection option 1.25 V removed. Slightly increased soft start time. Increased Increased output current capability.  Minor Minor changes in electrical characteristics. (Firmware ???)

#3 Changed DCDC EN6347QI (U19) to MPM3650CGQW-Z and adapted power circuit.

Type: Schematic Change

Reason: EOL of Component.

Impact: None. Increased  Increased current output capability. Minor changes in electrical characteristics. (???)

#4 Changed DCDC 171050601 (U22, U26, U29) to MPM3650CGQW-Z and adapted power circuit.

Type: Schematic Change

Reason: BOM Optimization.

Impact: (???)None. Minor changes in electrical characteristics.

#5 Changed DCDC 171050601 (U18) to MPM3683GMN-10 and adapted power circuit.

Type: Schematic Change

Reason: BOM Optimization.

Impact: (???)None. Increased current output capability. Minor changes in electrical characteristics.

#6 Changed DCDC EN5311QI (U28, U43) to MP2164GG-Z and adapted power circuit.

Type: Schematic Change

Reason: EOL of Component.

Impact: None. Increased current output capability. Minor changes in electrical characteristics. (???)

#7 Changed load switch TPS27082LDDCR (Q1, Q2, Q3) to MP5077GG-Z and adapted circuit.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None. Increased current output capability. Minor changes in electrical characteristics. (???)

#8 Changed battery power supply circuit architecture. Changed LDO (U37) from TPS780180300 from TPS780180300 to TPS7A0212PDBVR and diode (D16) from SDMG0340LC-7-F to BAS70-05W. Added capacitor (C278), resistor (R269), and assembly option (default: not fitted) resistor (R270).

Type: Schematic Change

Reason: Follow AMD recommendation.

Impact: Reduced voltage level for signal "PSBATT" : Change battery voltage supply from 1.8 V to 1.2 V to follow AMD recommendation.
Impact:  (???)

#9 Reordered MGT signal connection at each FireFly connector (J6, J21) separately.

Type: Schematic Change

Reason: Improve FireFly handling and harmonize with TEBF0818 series.

Impact: If FireFly is used using custom firmware needs to be adapted by customer.

#10

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Changed eMMC (U2) from MTFC16GJVEC-2M WT to SDINBDG4-8G-XI2.

Type: BOM Schematic change

Reason: EOL of Component.

Impact: None. Replacement has same capacity as used on corresponding affected variant. Reference designs for vivado versions 2019.2 and 2020.2 were tested and work properly without any changes. (???) Reduced eMMC memory density from 16 GByte to 8 GByte. Increased operating temperature range from (-25 °C - +85 °C) to (-40 °C - +85 °C). Changed package from 169 ball WFBGA to 153 ball BGA.

#11 Restructered PCIe clock system tree. Differential clock (signals "CLK0_N" and "CLK0_P") coming from connector (J2) is distributed via new added fanout buffer NB3L202KMN (U56) to PCIe connector (J11) (signals "PCI_REF_P" and "PCI_REF_N") and B2B connector (J2) (signals "B505_CLK0_P" and "B505_CLK0_N"). Removed clock oscillator DSC1123CI2-100.0000T (U6).

Type: Schematic Change

Reason:  Harmonize with TEBF0818 seriesChanged PCIe clock to HCSL.

Impact: None.

#12 Changed AC coupling (C93/C94 [REV04A]) to DC coupling (R263/R264 in REV05) for differential clock signals "CLK0_N" and "CLK0_P". Removed capacitor (C94).

Type: Schematic Change

Reason: Harmonize with TEBF0818 seriesChanged PCIe clock to HCSL.

Impact: None.

#13 Changed MEMS oscillator (U10) from SiT8008AI-73-XXS-52.000000E to SiT8008BI-73-XXS-52.000000E.

Type: BOM change

Reason: EOL of Component.

Impact: None. Clock revision changed.

#14 Changed power supply for SFP+ connector (J14) from power rail "3.3V_PCI" to power rail "3.3V_PER".

Type: Schematic Change

Reason: Harmonize with TEBF0818 series.

Impact: None.

#15 Removed pull-up resistor (R107, R108, R117, R118, R124, R127) for SFP+ connector (J14).

Type: Schematic Change

Reason: Harmonize with TEBF0818 seriesBOM Optimization.

Impact: None. Resistors were not fitted on previous revision.

#16 Changed pull-up resistor voltage for resistor (R18, R21, R86, R87, R113 ... R115, R121 ... R123).

Type: Schematic Change

Reason: Harmonize with TEBF0818 series.

Impact: None.

#17 Inserted level shifter circuit (T7, T8) between CPLD (U39) (signal "PWROK") and ATX connector (J20) (signal "PWR_OK").

Type: Schematic Change

Reason: Fix voltage level for signal "PWROK".

Impact: None. Change voltage level between CPLD voltage rail "3V3SB" and ATX connector voltage rail "5VSB" for signal "PWROK".

Impact: None.

#18 Inserted MOSFET (T9) circuit for level shifting and logic level inverting between CPLD (U39) (signal "PSON") and ATX connector (J20) (signal "PS_ON_N").

Type: Schematic Change

Reason: Fix voltage level for signal "PSON".

Impact: None. Change voltage level between CPLD voltage rail "3V3SB" and ATX connector voltage rail "5VSB" and harmonize with TEBF0818 series.Impact: None" for signal "PSON". Change logic level for signal "PSON". CPLD firmware reflects it but customer firmware needs to be checked/adapted by customer.

#19 Changed ESD protection diode (U11, U20, U49 ... U51) from ESD3V3U4ULC E6327 to CPDA10R3V3U-HF.

Type: Schematic Change

Reason: EOL of Component.

Impact: None.

#20 Connected all shield signals for connector (J7) together to net "FGND". Removed shield signals (J7) from net "F2GND". Removed capacitor (C261).

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Reason: Harmonize with TEBF0818 series. (???)

Impact: None.

#22 Inserted FGND3 with resistor (R43 [REV05]) and capacitor (C93 [REV05]) for SFP+ connector (J14) shield.

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Reason: Improve ESD protection.

Impact: None.

#23 Changed Fan F455B-05LD (M1) to Fan MF40060V2-1000U-A99 (MP1) and updated according mechanical screws, nuts, crimp contacts, and housing (JX1).

Type: BOM change

Reason:  EOL of Component.

Impact: Specified airflow of fan decreases slightly increases from 0.03 028 m³/min to 0.028 155 m³/min.  Specified acoustic noise increases from 20 dB(A) to 25.3 dB(A). (???)Increased temperature range from (-10 °C - +60 °C) to (-10 °C - +70 °C).

#24 Added assembly option (default: not fitted) for cooling solution with fan controller LM96163CISD/NOPB (U54), temperature sense MMBT3904 (T12), and AND Gate (U55).

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Reason: Harmonize with TEBF0818 series.

Impact: None.

Weiter ab hier:

#25 Connected fan controller LM96163CISD/NOPB (U54) to I2C bus (signals "SC_SCL" and "SC_SDA").

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