Page History
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Parameter | Min | Max | Units | Notes |
---|---|---|---|---|
Vin supply voltage | -0.3 | 6.0 | V | |
Vin33 supply voltage | -0.4 | 3.6 | V | |
VBat supply voltage | -1 | 6.0 | V | |
PL IO Bank supply voltage for HR I/O banks (VCCO) | -0.5 | 3.6 | V | |
PL IO Bank supply voltage for HP I/O banks (VCCO) | -0.5 | 2.0 | V | TE0715-xx-15 does not have HP banks |
I/O input voltage for HR I/O banks | -0.4 | VCCO_X+0.55 | V | |
I/O input voltage for HP I/O banks | -0.55 | VCCO_X+0.55 | V | TE0715-xx-15 does not have HP banks |
GT Receiver (RXP/RXN) and Transmitter (TXP/TXN) | -0.5 | 1.26 | V | |
Voltage on Module JTAG pins | -0.4 | VCCO_0+0.55 | V | VCCO_0 is 3.3V nominal |
Storage Temperature | -40 | +100 | C |
Note |
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Please check Xilinx Datasheet for complete list of Absolute maximum and recommended operating ratings for the Zynq device (DS181 Artix or DS182 Kintex). |
Recommended Operating Conditions
Parameter | Min | Max | Units | Notes | Reference document |
Vin supply voltage | 2.5 | 5.5 | V | ||
Vin33 supply voltage | 2.375 | 3.465 | V | ||
VBat supply voltage | 2.7 | 5.5 | V | ||
PL IO Bank supply voltage for HR I/O banks (VCCO) | 1.14 | 3.465 | V | Xilinx Document DS191 (v1.17) November 24, 2015 | |
PL IO Bank supply voltage for HP I/O banks (VCCO) | 1.14 | 1.89 | V | TE0715-xx-15 does not have HP banks | Xilinx Document DS191 (v1.17) November 24, 2015 |
I/O input voltage for HR I/O banks | V | Please check Xilinx Document DS191 (v1.17) November 24, 2015 | |||
I/O input voltage for HP I/O banks | V | TE0715-xx-15 does not have HP banks | Please check Xilinx Document DS191 (v1.17) November 24, 2015 and DS187 (v1.17) November 24, 2015 | ||
Voltage on Module JTAG pins | 3.135 | 3.465 | V | VCCO_0 is 3.3 V nominal |
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Physical Dimensions
Module size: 50 mm × 40 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 8mm
PCB thickness: 1.6mm
Highest part on PCB: approx. 2.5mm. Please download the step model for exact numbers.
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Overview
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