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Scroll Title
anchorTable_OBP_FTDI
titleFTDI chip interfaces and pins

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FTDI Chip U3 PinSignal Schematic NameConnected toNotes
Pin 12, ADBUS0TCKFPGA bank 1B, pin G2JTAG interface
Pin 13, ADBUS1TDIFPGA bank 1B, pin F5
Pin 14, ADBUS2TDOFPGA bank 1B, pin F6
Pin 15, ADBUS3TMS

FPGA bank 1B, pin G1

Pin 32, BDBUS0BDBUS0FPGA bank 8, pin A4user configurable
Pin 33, BDBUS1BDBUS1FPGA bank 8, pin B4user configurable
Pin 34, BDBUS2BDBUS2FPGA bank 8, pin B5user configurable
Pin 35, BDBUS3BDBUS3FPGA bank 8, pin A6user configurable
Pin 37, BDBUS4BDBUS4FPGA bank 8, pin B6user configurable
Pin 38, BDBUS5BDBUS5FPGA bank 8, pin A7user configurable

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SPI Flash Memory

On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interface.

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titleQuad SPI Flash memory interface

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Signal Schematic NameConnected toNotes
F_CSFPGA bank 8, pin B3chip select
F_CLKFPGA bank 8, pin A3clock
F_DIFPGA bank 8, pin A2data in / out
nSTATUS

FPGA bank 8, pin C4

data in / out, configuration dual-purpose pin of FPGA
DEVCLRNFPGA bank 8, pin B9data in / out, configuration dual-purpose pin of FPGA
F_DOFPGA bank 8, pin B2data in / out




Scroll Title
anchorTable_OBP_RTC
titleI2C interface MIOs and pins

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MIO PinSchematicU? PinNotes










RTC


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anchorTable_OBP_I2C_RTC
titleI2C Address for RTC

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MIO PinI2C AddressDesignatorNotes





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