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Template Revision 1.4.1 (modified)
Basic Notes
- export PDF to download, if vivado revision is changed!
- Template is for different design and SDSoC and examples, remove unused or wrong description!
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Date | Vivado | Project Built | Authors | Description |
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2018-01-3108-27 | 2017.1 | TE0701_zsys_SDSoC_EDDP_FOC-vivado_2017.1-build_05_20180827095945.zip | UTIA | initial release |
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For general structure and of the reference design, see Project Delivery - AMD devices
Type | Location | Notes |
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Vivado | <design name>/block_design <design name>/constraints <design name>/ip_lib | Vivado Project will be generated by TE Scripts |
SDK/HSI | <design name>/sw_lib | Additional Software Template for SDK/HSI and apps_list.csv with settings for HSI |
PetaLinux | <design name>/os/petalinux | PetaLinux template with current configuration |
SDSoC | <design name>/../SDSoC_PFM | SDSoC Platform will be generated by TE Scripts or as separate download |
Type | Location | Notes |
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Reference Design is available on:
TE0701_zsys_SDSoC_EDDP_FOC 2017.1 platform with TEC0053 Power Stage
3-phase brush-less DC motor control with field oriented control (FOC) algorithm implemented in SDSoC 2017.1 on TE0720 module and TE0701-06 carrier board. The TEC0053-04 - EDPS Power Stage controls the BLDC Motor with mounted Encoder.
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v.17 | UTIA |
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2018-08-15 | v.1 |
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