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Scroll Title |
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anchor | Table_PWR_BV |
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title | Zynq SoC bank voltages. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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| Schematic Name | | Notes |
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Bank 1A | VCCIO1A | 3.3V |
| Bank 1B | VCCIO1B | 3.3V |
| Bank 2 | VCCIO2 | 3.3V |
| Bank 3 | VCCIO3 | 3.3V |
| Bank 5 | VCCIO5 | 3.3V |
| Bank 6 | VCCIO6 | 3.3V |
| Bank 8 | VCCIO8 | 3.3V |
|
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Board to Board Connectors
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Scroll Title |
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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|
Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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|
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Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
| Reference Document |
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VIN supply voltage (5.0V nominal) | 4.75 | 5.25 | V |
| I/O Input voltage for FPGA I/O bank | -0.5 | 4.12 | V | Intel MAX 10 datasheet | Voltage on ADC IC U15 pins | -5.0 | 5.0 | V | AD4003BCPZ datasheet | Analog reference voltage on IC U15 | 5.0 | 5.0 | V | AD4003BCPZ datasheet | Storage Temperature | -40 | +85 | °C |
|
|
Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
scroll-scroll-title |
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anchor | Table_TS_ROC |
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title | Recommended operating conditions. |
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|
Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
---|
widths | |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
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|
ParameterUnitsV | See ???? datasheets. | V | See Xilinx ???? datasheet. | V | See Xilinx ???? datasheet. | V | See Xilinx ???? datasheet. | V | See Xilinx ???? datasheet. | V | See Xilinx ???? datasheet. | V | See Xilinx ???? datasheet. | °C | See Xilinx ???? datasheet. | VIN supply voltage (5.0V nominal) | 4.75 | 5.25 | V |
| I/O Input voltage for FPGA I/O bank | -0.5 | 4.12 | V | Intel MAX 10 datasheet | Voltage on ADC IC U15 pins | -0.1 | 5.1 | V | AD4003BCPZ datasheet | Analog reference voltage on IC U15 | 5.0 | 5.0 | V | AD4003BCPZ datasheet | Storage Temperature | 0 | +70 | °C |
°C | See Xilinx ???? datasheet.
|
Physical Dimensions
Module size: ?? mm × ?? mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? mm.
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