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Green

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Green

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3.3V

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Table 5: JTAG interface signals.

MIO	Function	Connected To	Notes
0	SDCARD	J10-9	Card detect switch.
1	QSPI	U5-1	SP0-CS
2	QSPI	U5-5	SPI0-DQ0
3	QSPI	U5-2	SPI0-DQ1
4	QSPI	U5-3	SPI0-DQ2
5	QSPI	U5-7	SPI0-DQ3
6	QSPI	U5-6	SPI0-SCK
7	GPIO	U18-27	USB PHY reset
9	LED	D2	Red LED
10	SDCARD	J10-7	DAT0
11	SDCARD	J10-3	CMD
12	SDCARD	J10-5	CLK
13	SDCARD	J10-8	DAT1
14	SDCARD	J10-1	DAT2
15	SDCARD	J10-2	CD/DAT3
28	USB-OTG	U18-7	OTG-DATA4
29	USB-OTG	U18-31	OTG-DIR
30	USB-OTG	U18-29	OTG-STP
31	USB-OTG	U18-2	OTG-NXT
32	USB-OTG	U18-3	OTG-DATA0
33	USB-OTG	U18-4	OTG-DATA1
34	USB-OTG	U18-5	OTG-DATA2
35	USB-OTG	U18-6	OTG-DATA3
36	USB-OTG	U18-1	OTG-CLK
37	USB-OTG	U18-9	OTG-DATA5
38	USB-OTG	U18-10	OTG-DATA6
39	USB-OTG	U18-13	OTG-DATA7
48	ESP	J5-2	ESP_TXD
49	ESP	J5-7	ESP_RXD
52	ESP	J5-6	MOD_RST
53	ESP	J5-3	ESP_GPIO0

I2C I²C interface pins from the ZYNQ Zynq SoC PL bank 34 are connected to the connector J1. There are no on-board I2C slave devices.

Signal	ZYNQ Zynq SoC Pin	Connected To
SDA	R13	J1-9
SCL	P13	J1-10

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Clock Signal	Frequency	IC	Signal, Pin
Processing system (PS) reference clock.	52.000000 MHz	U1	PS_CLK, C7
USB transceiver reference clock.	52.000000 MHz	U18	OTG-RCLK, 26
High-speed USB to multipurpose UART/FIFO oscillator input.	12.000000 MHz	U3	OSCI, 3

LED	Color	Connected To	Description and Notes
D2	Red	MIO9, U1
D6	Green	Bank 34, U1	FPGA_LED
D7	Green	3.3V	PWR_LED

Power and Power-On Sequence

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