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The TE0723 board is equipped with one push buttons S1:
| Button | Signal Schematic Name | Connected to | Notes |
|---|---|---|---|
| S1 | 'NRST' | Voltage Monitor Circuit, U23 | Triggers system reset. |
Table 15: Push buttons of the module
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Power consumption is to be determined by the user and depends on SoC's FPGA design and connected hardware.
| Board Variant | FPGA | Design | Typical Power, 25°C ambient |
|---|---|---|---|
| TE0723-02 | XC7Z010-1CLG225C | Not configured | TBD* |
| TE0723-03M | XC7Z010-1CLG225C | Not configured | TBD* |
| TE0723-03-07S-1C | XC7Z007S-1CLG225C | Not configured | TBD* |
Table 15: Module power consumption
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The voltage direction of the power rails is directed at on-board connectors' view:
| Header Main Power Pins Designator | VCC / VCCIO | Direction | Pins | Notes | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| J12 | VCCIO_335V | In | 2, 4, 6 | - | 1 | .8VOut | 5 | - | ||
| 2.5V | Out | 3 | - | |||||||
| 5V power supply pin header. | ||||||||||
| J3 | 3 | 3.3V | Out | 1 | - | J7 | VCCIO_13 | In | 2, 4, 6 | On-board 3.3V voltage level available. |
| 5V | In / | 1.8V | Out | 5 | On- | |||||
| 2.5V | OUt | 3 | - | |||||||
| 3.3V | Out | 1 | - |
Table 20: Power Pin description of VCCIO selection jumper pin header.
| board 5.0V voltage level available or supply pin. |
Table 20: Main power pin header description
| I/O pin header | Main Power Jack and Pins Designator | VCC / VCCIO | Direction | Pins | Notes |
|---|---|---|---|---|---|
| J12J55VIN | 3.3V | InOut | 1 | - | |
| J9 | 5VIN | In / Out | A1, A2 | also usable as '5VIN' power supply to the Carrier Board as alternative to J12 | |
| J2 | VBAT_IN | In | 1 | Attention: Pin 2 connected to ground. VBAT_IN voltage on this pin cause short-circuit. | |
4, 8 | I/O header VCCIO. | ||||
| J6 | 3.3V | Out | 6, 12 | I/O header VCCIO. |
Table 21: Main Power jack and pins description.Table 20: Power pin description of I/O pin header
| Peripheral Socket Designator | VCC / VCCIO | Direction | Pins | Notes |
|---|
| J8 / |
| J9 | USB-VBUS | In / Out | 1 | Direction depends on USB2 mode. |
| J10 |
| 3.3V | Out | 4 | MikroSD Card socket VDD. |
Table 22: Power pin description of peripheral connector.
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Power Rail Name
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J3 Pins
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Direction
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Table 16: Board power rails
Bank Voltages
Bank | Bank I/O Voltage VCCO | Voltage Range |
|---|---|---|
| 0 (config) | 3.3V | fixed |
| 500 (MIO) | 3.3V | fixed |
| 501 (MIO) | 3.3V | fixed |
| 34 (HR) | 3.3V | fixed |
| 35 (HR) | 3.3V | fixed |
Table 17: Board bank voltages
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