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Scroll Title |
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anchor | Table_PWR_PR |
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title | Module power rails. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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B2B NamePower Signal | B2B JM1 Pin | B2B JM2 Pin | B2B JM3 Pin | Direction | Notes |
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VIN | 1,3 | - | - | Input | Supply voltage from carrier board. | VCCO_13 | 39 | - | - | I/OInput |
| VBATT | - | 1 | - | Output | RTC Supply voltage | 3.3V | 19 | 4 | 25,57 | Output | Internal 3.3V voltage level. | VMIO | - | 2 |
| Input | Variable and supplied by carrier | 1.8V | - | 5 | - | Output | Internal 1.8V voltage level. |
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Scroll Title |
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anchor | Table_TS_AMR |
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title | Absolute maximum ratings |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Min | Max | Unit | Description | VCCO_MIO0
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VIN supply voltage | -0. | 53 | 3.665 | V | TPS54260-Q1 datasheets. | VMIO | -0.5 | PS MIO I/O supply voltage for HR I/O banks | VCCO_MIO1 | 1.71 | 3.456 | V | PS MIO I/O supply voltage for HR I/O banks | VCCO | -0.5 | 3.6 | V | PL supply voltage for HR I/O banks | VIN | 1.71 | 3.45 | V | I/O input voltage for HR I/O banks | Storage Temperature | -40 | +85 | °C |
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Scroll Title |
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anchor | Table_TS_ROC |
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title | Recommended operating conditions |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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ParameterSymbol | Min | Max | Units | Reference Document |
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VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. | Supply voltage for PS MIO banksVMIO | 1.71 | 3.465 | V | See Xilinx DS187 data sheet.I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. | Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 data sheet. | I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 data sheet. | datasheet. | Operating Temperature | -40 | +105 | °C |
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Hardware Revision History
Product changes can be seen in PCN page.
Scroll Title |
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Note | PCN | Changes |
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| 03 | Prototype |
| | 04 | Product Release | PCN | 03 | - U1 DDR3 IC changed from NT5CB256M16CP-DIH to NT5CC256M16CP-DIH
- Net DDR3-ODT0: added series resistor R55
- Added Traceability pad
- Net PS-POR-B: added pull-down resistor R56
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Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
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