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  • Xilinx Zynq XC7Z010 SoC
  • Dual ARM Cortex A9
  • 512 MByte DDR3L SDRAM
  • 16 MByte quad SPI Flash memory
  • Hi-speed USB2.0 ULPI transceiver
  • 23 FPGA I/O's available on board-to-board connectors
  • Micro SD Card socket with card detect signal
  • Micro USB OTG
  • On-board USB JTAG and UART
  • RGB LED (connected to PL I/O)
  • "Done" LED (inverted polarity)
  • CERN Open Hardware Licence 1.2

 

Additional assembly options are available for cost or performance optimization upon request.

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Table 1: Initial delivery state of programmable devices on the module. 

Boot Process

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Signals, Interfaces and Pins

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