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anchorFigure_OV_BD
titleTE0728 block diagram


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DDR3 SDRAM

The TE0728 SoM has two a volatile DDR3 SDRAM IC for storing user application code and data. Size of DDR3 can be varied in different assembly versions. 

 Configuration of the DDR3 memory controller in the FPGA should be done using the MIG tool in the Xilinx Vivado Design Suite IP catalog.

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