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Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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FPGA BankTypeB2B ConnectorI/O Signal CountVoltage LevelNotes
13HRJ148(24)VCCO_13variable from carrier
500HRJ143.3V
501HRJ237VMIO1variable from carrier
33HRJ3343.3V
35HRJ3203.3V
35HRJ2223.3V



Ethernet PHY

Ethernet pins connections to Board to Board (B2B). Ethernet components ETH1 and ETH2 are connected to B2B connector J3.

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anchorTable_SIP_B2B_Eth
titleEthernet PHY B2B connectors.

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SchematicETH1ETH2DirectionPullupNotes
CTREFJ3-57J3-25In
Magnetics center tap voltage
TD+J3-58J3-28Outon-boardTransfer
TD-J3-56J3-26Outon-board
RD+J3-52J3-22Inon-board
RD-J3-50J3-20Inon-board
LED1J3-55J3-23Outon-board
LED2J3-53J3-21Outon-board
LED3J3-51J3-19Outon-board
POWERDOWN/INTL21R20Inon-chip
RESET_NM15R16Inon-chipActive low PHY Reset


CAN PHY

CAN pins connections to Board to Board (B2B).

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anchorTable_SIP_B2B_CAN
titleCAN B2B connectors.

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SchematicB2BVoltage LevelMIO PinNotes
CANH/CANLJ1-23.3VCANL/J1-4-
TX/RX
MIO8/MIO93.3V



JTAG Interface

JTAG access to the Xilinx XA7Z020 FPGA through B2B connector JM2.

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Scroll Title
anchorTable_OBP_MIOs
titleMIOs pins

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MIO PinSchematicNotes
MIO0MIO0RTC interrupt
MIO1SPI_CSSPI Flash
MIO2-5SPI_DQ0-3/M0-3SPI Flash
MIO6SPI_SCK/M4SPI Flash clock
MIO7LED REDLED
MIO8DTXCAN Transceiver
MIO9RRXCAN Transceiver
MIO10IO_0J1-7
MIO11IO_1J1-9
MIO12IO_2J1-11
MIO13IO_3J1-13
MIO14SCLI2C
MIO15SDAI2C
MIO16-MIO53PS_MIOxx


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