Page History
...
- 512 MByte DDR3 SDRAM, Cypress DDR3 Memory, U1
- Xilinx Automotive XA7Z020-1CLG484Q ,U2
- 100 MBit Ethernet transceiver DP83848MPHPEPDP83848, U3
- 3.5V to 60V step-down converter, Texas Instruments TPS54260-Q1, U4
- Standard Clock Oscillators Oscillators @ 25MHz 3.3V, SiTime SiT1618xxSiT1618AA, U5
- 1.5 A Low Dropout Linear Regulator, Texas Instruments, TPS74801QRGWRQ1TPS74801-Q1, U6
- Real Time Clock, Micro Crystal RV-3029-C3, U7
- 3.5V to 60V step-down converter, Texas Instruments TPS54260-Q1, U8
- 3.5V to 60V step-down converter, Texas Instruments TPS54260-Q1, U9
- 100 MBit Ethernet transceiver DP83848MPHPEP, U10
- 64 Kbit I2C EEPROM, 24AA64/ 24LC64/ 24FC64,(24xx64), U11
- Low-Quiescent-Current Priggrammable Delay Supervisory Circuit, Texas Instruments TPS3808GxxTPS3808G01-Q1, U12
- 16 MByte QSPI Nor Flash memory, Cypress S25FL127, U13
- Standard Clock Oscillators Oscillators @ 50MHz 3.3V, SiTime SiT8918xxSiT8918AA, U14
- Low-Quiescent-Current Priggrammable Delay Supervisory Circuit, Texas Instruments TPS3808GxxTPS3808G01-Q1, U15
- CAN Tranceiver, Texas Instruments SN65HVD230Q, U16
...
| Chip/Interface | IC | PS7 Peripheral | |
|---|---|---|---|
| SPI Flash | S25FL127SABMFV10 | QSPI0 | 16 MByte Flash |
| I2C EEPROM | 24xx6424LC64 | I2C0 | 8 KByte EEPROM |
| RTC I2C | RV-3029 | I2C0 | |
| RTC Interrupt | RV-3029 | GPIO - MIO0 | |
| User LED | LED Green | GPIO - MIO7 |
...
The Microchip Technology Inc. 24AA64/24LC64/ 24FC64 (24XX64*) is 24LC64 is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. Lowvoltage design permits operation down to 1.7V, with standby and active currents of only 1 μA and 3 mA, respectively. It has been developed for advanced, lowpower applications such as personal communications or data acquisition. The 24XX64 24LC64 also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space.
...
Low Quiescent Current Programmable Delay Supervisory Circuit
The TPS3808GxxTPS3808G01-Q1 microprocessor supervisory circuits monitor system voltages from 0.4 V to 5 V, asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the useradjustable delay time after the SENSE voltage and MR return above their thresholds. Datasheet is available in Texas Instruments website.
The TPS3808GxxTPS3808G01-Q1 device uses a precision reference to achieve 0.5% threshold accuracy for VIT ≤ 3.3 V. The reset delay time can be set to 20 ms by disconnecting the CT pin, 300 ms by connecting the CT pin to VDD using a resistor, or can be useradjusted from 1.25 ms to 10 s by connecting the CT pin to an external capacitor. The TPS3808GxxTPS3808G01-Q1 has a very low typical quiescent current of 2.4 μA, so it is well suited for battery-powered applications.
...
| Power Rail Name | B2B Connector JM1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
|---|---|---|---|---|---|
| VIN | 1,3 | - | - | Input | |
| VMIO | - | 2 | - | I/O | |
| 3.3V | 19 | 4 | 25,57 | Output | |
1.8V | - | 5 | - | Output |
Bank Voltages
Bank | Schematic Name | Voltage | Notes |
|---|---|---|---|
| 500 | VCCO_MIO0_500 | 3.3V | |
| 501 |
VCCO_MIO1_500 | 3.3V | ||
| 502 | VCCO_DDR_502 | 1.5V | |
| 13 HR | VCCO_13 | 3.3V | Supplied by the carrier board. JM1 |
| 33 HR | VCCO_33 | 3.3V | Supplied by carrier board. JM3 |
| 34 HR | VCCO_34 | 3.3V | |
| 35 HR | VCCO_35 | 3.3V | Supplied by the carrier board. JM2,JM3 |
Board to Board Connectors
...
| Symbols | Description | Min | Max | Unit |
|---|---|---|---|---|
| VCCPINT | PS internal logic supply voltage | 0.95 | 1.05 | V |
| VCCPAUX | PS auxiliary supply voltage | 1.71 | 1.89 | V |
| VCCPLL | PS PLL supply | 1.71 | 1.89 | V |
| VCCO_DDR | PS DDR I/O supply voltage | 1.14 | 1.89 | V |
| VCCO_MIO0 | PS MIO I/O supply voltage for MIO banks | 1.71 | 3.45 | V |
| VCCO_MIO1 | PS MIO I/O supply voltage for MIO banks | 1.71 | 3.45 | V |
| Parameter | Min | Max | Units | Reference Document |
|---|---|---|---|---|
| VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. |
| Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
Physical Dimensions
| Scroll Title | ||||
|---|---|---|---|---|
| ||||
...
Overview
Content Tools