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title | Power On Sequence |
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The microprocessor supervisory circuits monitor system voltages asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user adjustable delay time after the SENSE voltage and MR return above their thresholds. Datasheet is available in Texas Instruments website.
Scroll Title |
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anchor | Figure_PWR_VMC |
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title | Voltage Monitor Circuit |
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Power Rails
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title | Module power rails. |
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B2B Name | B2B JM1 Pin | B2B JM2 Pin | B2B JM3 Pin | Direction | Notes |
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VIN | 1,3 | - | - | Input | Supply voltage from carrier board. | VCCO_13 | 39 | - | - | I/O |
| VBATT | - | 1 | - | Output | RTC Supply voltage | 3.3V | 19 | 4 | 25,57 | Output | Internal 3.3V voltage level. | VMIO | - | 2 |
| Input | 3.3V from carrier | 1.8V | - | 5 | - | Output | Internal 1.8V voltage level. |
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