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| Scroll Title |
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| anchor | Table_OV_RST |
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| title | Reset process. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Signal | B2B | I/O | Note |
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Reset | J2-7 | Input | Comes from Carrier | | RST_OUT | J2-9 | Output | PS_PROB_B |
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Signals, Interfaces and Pins
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| Scroll Title |
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| anchor | Table_OBP |
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| title | On board peripherals |
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|
| Scroll Table Layout |
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| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
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| Chip/Interface | Product | Notes |
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| SPI Flash | U13 | 16 MByte Flash | | EEPROM | U11 | 64 Kbit EEPROM | | RTC | U7 | Real Time Clock | | DDR3 SDRAM | U1 | Volatile Memory | | Ethernet | U3, U10 | Two 100 Mbit Ethernet | | CAN Transceiver | U16 |
| | User LED | D4 | Green LED |
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The Microchip Technology Inc. 24xx64 is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. Lowvoltage design permits operation down to 1.7V, with standby and active currents of only 1 μA and 3 mA, respectively. It has been developed for advanced, lowpower applications such as personal communications or data acquisition. The 24xx64 also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space.
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There are two 100 MBit Extreme Temperature Ethernet provided by Texas Instrument on the board. Datasheet is provided at TI website. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz source is provided from MEMS Oscillator. There is no sharing of signals for the two PHY's.
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The low-dropout (LDO) provides an easy-to-use robust power management solution for a wide variety of applications. User programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well- suited for powering many different types of Monitoring or Provides a Sequencing Signal processors and ASICs. The enable input and power for Other Supplies good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing Voltage Startup requirements of FPGAs, DSPs, and other applications with special start-up requirements.
Clock Sources
| Scroll Title |
|---|
| anchor | Table_OBP_CLK |
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| title | Osillators |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
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| IC | Description | Frequency | Used as |
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| U14 | MEMS Oscillator | 50 MHz | PS PLL clock | | U5 | MEMS Oscillator | 25 MHz | Ethernet PHY Clock | | U7 | RTC (internal oscillator) | 32.768 KHz | Used by RTC, CLKOUT of RTC not connected |
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