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On-board QSPI flash memory S25FL127SABMFV10 is used to store initial FPGA configuration. Datasheet is provided here. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
RTC I2CI2C
The RV-3029-C3 is an ultra miniature Real-Time-Clock Module with embedded Crystal. This RTC has an I2C I2C Bus (2-wire SerialInterface) and offers temperature compensated time. The STC-Smart Temperature Compensation is calibrated in the factory and leads to a very high time-accuracy of ± 6ppm from -40°C to +85°C and ± 8ppm from -40°C to +125°C.
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| Designator | Color | Connected to | Active Level | IO Standard |
|---|---|---|---|---|
| D9 | Green | DONE | Low | not applicable |
| D8 | RED | MIO7 | HighLVCMOS33 | not applicable |
| D4 | Green | PL pin V18 | High | LVCMOS33 |
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Power supply with minimum current capability of 3A 3.5 A for system startup is recommended.
Power Consumption
| Power Input Pin | Typical Current |
|---|---|
| VIN | TBD* |
* TBD - To Be Determined
Power Distribution Dependencies
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| Parameter | Min | Max | Units | Reference Document |
|---|---|---|---|---|
| VIN supply voltage | 23.55.5 | 60 | V | EN6347QI and EP53F8QI TPS54260-Q1 datasheets. |
| 3.3VIN supply voltage | 3.135 | 3.465 | V | 3.3V +/- 5%. |
| Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
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