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The Trenz Electronic TEBF0808 carrier board is a baseboard for the Xilinx Zynq Ultrascale+ MPSoC modules TE0808 and TE0803, which exposes the module's B2B connector pins to accessible connectors and provides a whole range of on-board components to test and evaluate the Zynq Ultrascale+ SoMs and for developing purposes. The carrier board has a Mini-ITX form factor making it capable to be fitted into a PC enclosure. On the PC enclosure's rear and front panel, essential data interfaces , sockets and connectors are accessible, there also Intel-PC compatible headers available for connecting the front panel elements to them.
Key Features
- Mini-ITX form factor, PC enclosure compatible
- ATX-24 power supply connector
- Optional 12V standard power plug
- Headers
- Intel 10-pin HDA Audio
- Intel 9-pin Power-/Reset-Button, Power-/HD-LED
- PC-BEEPER
- On-board Power- / Reset-Switches
- 2x Configuration 4-bit DIP-switches
- 2x Optional 4-wire PWM fan connectors
- PCIe Slot - one PCIe lane (16 lane connector)
- CAN FD Transceiver (10 Pin IDC connector and 6-pin header)
- 4x On-board configuration EEPROMs (1x Microchip 24LC128-I/ST, 3x Microchip 24AA025E48T-I/OT)
- Dual SFP+ Connector (2x1 Cage)
- One Display-Port (single lane)
- One SATA Connector
- 2x USB3.0 A Connector (Superspeed Host Port (Highspeed at USB2.0))
- 1x USB3.0 on-board header with two ports
- FMC HPC Slot (FMC_VADJ max. VCCIO)
- FMC Fan
- Gigabit Ethernet RGMII PHY with RJ45 MegJack
- All Carrier Board peripherals' I²C-interfaces muxed to MPSoC's I²C-interface on PS bank 503
- Quad programmable PLL clock generator SI5338A
- 2x SMA coaxial connectors for clock signals
- MicroSD- / MMC-Card Socket (bootable)
- 32 Gbit on-board eMMC memory (8 banks a 4 Gbit)
- Two System Controller CPLDs Lattice MachXO2 1200 HC
- One Samtec FireFly (4 GT lanes bidirectional)
- One Samtec FireFly connector for reverse loopback
- 2x JTAG/UART header ('XMOD FTDI JTAG Adapter'-compatible) for programming MPSoC and SC CPLDs
- 20 Pin ARM JTAG Connector (PS JTAG0)
- 3x PMOD connector (GPIO's and I²C interface to SC CPLDs / MPSoC module
- Carrier SC CPLD managing power-up sequence of MPSoC module
- On-board DC-DC PowerSoCs
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| MGT Bank | Type | Count of MGT Lanes | Schematic Names / Connector Pins | MGT Bank's Reference Clock Inputs from FMC Connector |
|---|---|---|---|---|
| 228 | GTH | 4 GTH lanes | B228_RX3_P, B228_RX3_N, pins J5-A10, J5-A11 B228_RX2_P, B228_RX2_N, pins J5-A6, J5-A7 B228_RX1_P, B228_RX1_N, pins J5-A2, J5-A3 B228_RX0_P, B228_RX0_N, pins J5-C6, J5-C7 | 1 reference clock signal (B228_CLK0) from FMC connector Si5345 CLK3 signal of prog. PLL on mounted SoM routed |
| 229 | GTH | 4 GTH lanes | B229_RX3_P, B229_RX3_N, pins J5-B12, J5-B13 B229_RX2_P, B229_RX2_N, pins J5-B16, J5-B17 B229_RX1_P, B229_RX1_N, pins J5-A18, J5-A19 B229_RX0_P, B229_RX0_N, pins J5-A14, J5-A15 | 1 reference clock signal (B229_CLK0) from FMC connector Si5345 CLK2 signel of prog. PLL on mounted SoM routed |
| 230 | GTH | 2 GTH lanes | B230_RX1_P, B230_RX1_N, pins J5-B4, J5-B5 B230_RX0_P, B230_RX0_N, pins J5-B8, J5-B9 | Si5345 CLK1 signal of prog. PLL on mounted SoM routed |
Table 3: FMC connector pin-outs of available MGT-lanes of the MPSoC
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