TEBF0808 TRM

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Overview

The Trenz Electronic TEBF0808 board is a carrier for Trenz TE0803, TE0807 and TE0808 SoMs, which are equipped with AMD Zynq Ultrascale+ MPSoCs.

It exposes the SoMs B2B connectors to a whole range of basic PC, consumer and development IO connectors. These connectors provide the grounds for testing, evaluation and development purposes.

The carrier board is designed for Mini-ITX Form Factor, which makes it capable to be fitted into a PC enclosure. On the PC enclosure's rear and front panel, interfaces and connectors are accessible. Intel-PC compatible headers are available for the front panel.

Refer to http://trenz.org/tebf0808-info for current online available documentation.

Key Features

On Board
- 2x System Controller for periphery and SoM management
- 10/100/1000 BASE-T/X Ethernet PHY
- USB 3.0 PHY with VBUS control
- USB 2.0 PHY
- SDIO port switch
- 2x TE0790 adapters to convert USB 2.0 (Mini USB Type B) to JTAG/UART
- CAN bus transceiver
- 2x I2C switches
- Clocking:
  - Programmable Clock Generator
  - Clock fanout buffer for PCIe
  - Dedicated oscillator for SoM
  - Dedicated oscillators for each PHY
- LEDs:
  - 2x for RJ45 status signalling
  - 4x for SFP+ cages
  - 2x 2 for system controller status
  - 1x USB 3.0 status
- Options ¹⁾:
  - Programmable oscillator
  - Controller for 5 V FMC fan
  - Smart power switch for 12 V fan
Storage ²⁾
- e.MMC 8 GB
- 3x EEPROMs with 1536 bit storage and 48 bit MAC address
- 2x EEPROMs with 2 kbit storage
Interface
- SoM socket - Trenz 5.2 x 7.6 4x B2B connector (Samtec SS5)
- Basic PC Standards:
  - Intel HD Audio header
  - Intel front panel IO header
  - PC beeper header - 4 pin
  - 3x Fans - 4-Wire: 2x 12 V and 1x 5 V
  - Power and Reset Button
  - 2x 4 DIP switches for configuration
  - 2x USB 3.0 A and 1x RJ45 Ethernet - stacked, back panel
- Consumer Standards:
  - USB 3.0 header
  - PCIe 2.0 X1 slot - physical PCIe X16
  - DisplayPort
  - SATA header
  - MicroSD Card socket
  - MMC Card socket
- Industrial Standards:
  - 2x SFP+ cages
  - Samtec FireFly connector
  - Samtec FireFly loopback connector
  - 2x CAN bus header
- Development Standards:
  - FMC HPC connector
  - I2C header for:
    - FireFly connector I2C
    - Programmable PLL on SoM
  - PMOD header for :
    - 2x I2C
    - 1x for 8x IO
  - JTAG/UART headers for TE790 adapters:
    - 1x SoM
    - 1x shared between System Controllers and FMC connector
  - JTAG / PJTAG header for ARM on SoM
  - SMA coaxial CLK connector as:
    - output from Clock Generator
    - input to SoM
Power
- 24x pin ATX power connector
- Barrel jack - 2.1 mm, for single power adapter supply
- Over current, reverse polarity, over and under voltage protection for both supply options
- Prioritisation of the ATX power connector over the barrel jack connector
- Controlling and monitoring of SoM voltage levels
- Backup battery holder - CR1220 / 3V
Dimension
- 170 mm x 170 mm / Mini-ITX form factor
Notes

¹⁾ Available as assembly variant or upon request.
²⁾ Pin/Package-compatible sizes upon request.

Block Diagram

TEBF0808 block diagrams

Main Components

TEBF0808 main components

ATX-24 power supply connector, J20
Barrel power Jack 2.1mm, J25
Battery holder for CR1220, B1
Intel front panel IO header, J10
Intel HD Audio header, J9
PC beeper header, J23
Power Button, S1
Reset Button, S2
4x DIP switches, S4, S5
Fan connector 5 V 4-Wire PWM for FMC, J19
Fan connector 12 V 4-Wire PWM, J26, J35
2x USB 3.0 A and RJ45 Ethernet - stacked, J7
USB 3.0 header, J8
PCIe 2.0 x1 connector - physical PCIe X16, J11
DisplayPort connector, J13
SATA header, J31
MicroSD Card socket - on bottom, J16
MMC Card socket, J27
2x SFP+ cages, J14
FMC HPC connector, J5
Samtec FireFly ECUO connector, J6/J15
Samtec FireFly ECUO loopback connector, J21/J22
I2C header for FireFly, J34
I2C header for programmable SoM PLL, J17
2x PMOD header - I2C only, P1, P3
PMOD 8x IO connector, P2
CAN bus header, J29, J24
Header for XMOD / TE0790 adapter, populated - JTAG/IO for SoM, J12
Header for XMOD / TE0790 adapter, populated - JTAG/IO for System Controller, J28
JTAG / PJTAG header for ARM on SoM, J30
SMA connector - CLK output from CLK generator, J32
SMA connector - CLK input to SoM, J33
B2B connectors - Samtec SS5, J1, J2, J3, J4

Initial Delivery State

Storage device name	Content	Notes
System Controllers (U17 / U39)	Firmware	Refer to TEBF0808 CPLD Firmware / TEBF0808 CPLD for more information.
Programmable Clock Generator (SI5338A-B-GMR)	Not programmed
Programmable Oscillator (570FBB000290DG)	Not programmed	Device is optional / Carrier variant dependent.
EEPROM (U5 / U24)	Not programmed
EEPROM with MAC (U36 / U41 / U42)	Not programmed	MAC is burned-in by manufacturer.
TE0790 adapter for SoM (J12)	Firmware	Refer to TE0790 TRM Documentation for more information.
TE0790 adapter for System Controller (J28)	Firmware	Refer to TE0790 TRM Documentation for more information.

Initial delivery state of programmable devices on the module

Signals, Interfaces and Pins

Connectors

Connector Type	Designator	Interface	IO count	Notes
B2B	J1	MGT FMC	10x MGT (RX/TX)
B2B	J1	MGT SFP+	2x MGT (RX/TX)
B2B	J1	IO	48x SE / 24x DIFF
B2B	J2 / J3	CLK loopback	1x DIFF	CLK loop from J2.13/15 to J3.59/61 (CLK7 / B230_CLK1)
B2B	J2	CLK out	1x DIFF	Oscillator U23 (B505_CLK1)
B2B	J2	CLK out	1x DIFF	PCIe inferred CLK B505_CLK0
B2B	J2	CLK in	1x DIFF	CLK8 - Input to CLK generator U35.
B2B	J2	CLK in	1x DIFF	CLK0 - Input to PCIe CLK fanout U56.
B2B	J2	MGT FireFly	4x MGT (RX/TX)
B2B	J2	MGT Displayport	1x MGT (TX)
B2B	J2	MGT SATA	1x MGT (RX/TX)
B2B	J2	MGT USB 3.0	1x MGT (RX/TX)
B2B	J2	MGT PCIe 2.0	1x MGT (RX/TX)
B2B	J3	IO	22x SE / 11x DIFF
B2B	J3	GPIO	18x SE	Connected to the System Controllers. Shared between them, SC/U17 - 10x SE, SC/U39 - 8x SE.
B2B	J3	CLK out	1x DIFF	Optional MGT B230 CLK
B2B	J3	CLK out	1x DIFF	SMA J33
B2B	J3	MGT FMC CLK	2x DIFF
B2B	J3	HD Audio	4x SE	Data, Bit and Frame CLK
B2B	J3	e.MMC	11x SE
B2B	J3	MIO	19x SE	Connected to the System Controllers. Shared between them, SC/U17 - 4x SE, SC/U39 - 15x SE
B2B	J3	SDIO	7x SE
B2B	J3	USB ULPI	12x SE
B2B	J3	ETH RGMII	12x SE
B2B	J3	ETH MDIO	2x SE
B2B	J4	IO	94x SE / 47x DIFF
B2B	J4	IO	3x SE	IO between SC U17 and SoM.
B2B	J4	IO	4x SE	PMOD P2 to SoM.

Board Connectors

Test Points

Test Point	REV05			REV04 / REV03 Signal	REV02 Signal	Notes
Test Point	Top	Bottom	Signal	REV04 / REV03 Signal	REV02 Signal	Notes
TP1	x		USB3_ID			USB 3.0
TP2		x	PSBATT
TP3		x	FMC_VADJ
TP4		x	VCC_MOD	3.3V_MOD
TP5		x	3.3V_PCI
TP6		x	5V
TP7		x	1.8V
TP8		x	3.3V_PER
TP9		x	1.2V		1.25V
TP10		x	3V3SB
TP11		x	12V_input_A	12V
TP12	x		U4C VDD_EFUSE		Not used
TP13		x	LDO_3.3V
TP14		x	PLL_FDEC	Not used
TP15		x	PLL_3V3
TP16		x	PLL_FINC	Not used
TP17	x		U22 pin PG	Not used
TP18		x	DP_TX_PWR	U31 OUT
TP19		x	DP_TX_HPD
TP20	x		U26 pin PG	Not used
TP21	x		U29 pin PG	Not used
TP22	x		U18 pin PG	Not used
TP23	x		12V_input_A_Fused	Not used
TP24	x		12V_input_B	Not used
TP25	x		12V_input_B_Fused	Not used
TP26	Not used
TP27	Not used
TP28		x	GND
TP29		x	GND
TP30		x	GND
TP31		x	GND
TP32		x	GND
TP33		x	USB0_ID			USB 2.0
TP34	Not used
TP35	Not used
TP36	x		SI_PLL_1V8

Test Points Information

On-board Peripherals

Chip/Interface	Designator	Connected to	Notes
System Controller	U17	ETH PHY U12 USB 3.0 PHY U4 USB 2.0 PHY U9 Fan 2 J35 PMOD 2 I2C CAN Transceiver U48 Bus transceiver U32 System controller U39 DIP switch S5 USB 3.0 Plug J7 MMC card socket J27 XMOD/TE0790 J28 20x Box/JTAG header J30 B2B J3 SFP Status LEDs D1/D8/D9/D10 ETH Status LEDs Status LEDs D4/D5	Refer to TEBF0808 CPLD Firmware / TEBF0808 CPLD for more information.
System Controller	U39	CLK U25 HD Audio U3 SDIO switch U15 MicroSD card J16 MMC card J27 Fan 1 J26 and Fan FMC J19 Beeper J23 I2C DIP switches S4 and S5 Button S1 and S2 XMOD/TE0790 J12 XMOD/TE0790 J28 Front panel IO J10 B2B J2 and J3 Status LEDs D6/D7	Refer to TEBF0808 CPLD Firmware / TEBF0808 CPLD for more information.
ETH PHY	U12	System controller U17 CLK U13 RJ45 connector J7 B2B J3
USB 3.0 PHY	U4	USB 2.0 PHY U9 CLK U10 I2C System controller U17 USB VBUS controller U14/U21 USB Status LED D17 USB 3.0 A J7 and header J8 B2B J3
USB 2.0 PHY	U9	USB 3.0 PHY U4 CLK U10 System controller U17
HD Audio	U3	I2C System controller U39 HD audio header J9 B2B J3
FMC connector	J5	I2C System controller U17 and U39 Clock generator U35 B2B J1/J3/J4
SDIO switch	U15	System controller U17 and U39 MicroSD and MMC sockets J16/J27
Fan controller ¹⁾	U55	System Controller U39 I2C FAN FMC J19
Smart Fan switch ¹⁾	U48	System Controller U17 FAN FMC J35
I2C switch	U16	I2C
I2C switch	U27	I2C
EEPROM	U5	I2C	Intended for USB 3.0 PHY.
EEPROM	U24	I2C
EEPROM with MAC	U36 / U41 / U42	I2C
PMOD	P1 / P3	I2C
PMOD	P2	System Controller U17 BUS transceiver U33
IO Expander	U38	I2C FMC HPC connector J5 PCIe X1 J11
IO Expander	U44	I2C SFP connector J14
XMOD / TE0790	J12	System controller U39 B2B J2	Refer to TE0790 TRM Documentation for more information.
XMOD / TE0790	J28	System controller U17 System controller U39	Refer to TE0790 TRM Documentation for more information.
Bus transceiver	U32	System controller U17 B2B J4
Bus transceiver	U33	PMOD 2 B2B J1/J4
Clock Generator	U35	B2B J2 System controller U17 FMC HPC connector J5 SMA CLK out J32
Clock Fanout	U59	PCI2 X1 B2B J2
Oscillator programmable ¹⁾	U45	B2B J3
Crystal	Y1	USB 3.0 PHY U4	26 MHz
Oscillator	U7	Clock generator U35	25 MHz
Oscillator	U23	B2B J2	150 MHz
Oscillator	U25	System controller U39	24.576 MHz for HD Audio
Oscillator	U13	ETH PHY U12	25 MHz
Oscillator	U10	USB 2.0 PHY U9	52 MHz

¹⁾ Assembly option.

On board peripherals

Configuration and System Control Signals

Signal Name	Connector Type	Connector.Pin	Direction ¹⁾	Description
ERR_STATUS	B2B	J2.86	IN	SoM PS Error Status ^{2) 3)}
ERR_OUT	B2B	J2.88	IN	SoM PS Error Out ^{2) 3)}
SRST_B	B2B	J2.96	OUT	Processor system reset signal ^{2) 3)}
INIT_B	B2B	J2.98	IN	FPGA initialisation pin or configuration error signal ^{2) 3)}
PROG_B	B2B	J2.100	OUT	Reset for configuration logic ^{2) 3)}
PUDC_B	B2B	J2.127	OUT	Set the state of internal pull-up resistors for Selected IO Definitions after power-up and during configuration ^{2) 3)}
MR	B2B	J2.83	OUT	Manuel reset / Power-on reset signal to the SoMs SoCs Programmable Logic and Processing System ^{2) 3)}
DONE	B2B	J2.116	IN	Programming system initialisation finished signal ^{2) 3)}
MODE3 / MODE2 / MODE1 / MODE0	B2B	J2.103 / J2.105 / J2.107 / J2.109	OUT	SoM Boot Mode ^{2) 3)}
EN_LPD	B2B	J2.108	OUT	Enable Low Power Domain voltage ²⁾
LP_GOOD	B2B	J2.106	IN	Signals state of Low Power Domain voltage ²⁾
EN_FPD	B2B	J2.102	OUT	Enable Full Power Domain voltage ²⁾
PG_FPD	B2B	J2.110	IN	Signals state of Full Power Domain voltage ²⁾
EN_PL	B2B	J2.101	OUT	Enable Programmable Logic voltage ²⁾
PG_PL	B2B	J2.104	IN	Signals state of Programmable Logic voltage ²⁾
EN_PSGT	B2B	J2.84	OUT	Enable Processor System Gigabit Transceiver voltages ²⁾
PG_PSGT	B2B	J2.82	IN	Signals state of Processor System Gigabit Transceiver voltages ²⁾
EN_DDR	B2B	J2.112	OUT	Enable DDR voltage ²⁾
PG_DDR	B2B	J2.114	IN	Signals state of DDR voltage ²⁾
EN_GT_L	B2B	J2.79	OUT	Enable SoMs left Gigabit Transceiver voltage ²⁾
PG_GT_L	B2B	J2.97	IN	Signals state of left Gigabit Transceiver voltage ²⁾
EN_GT_R	B2B	J2.95	OUT	Enable right Gigabit Transceiver voltage ²⁾
PG_GT_R	B2B	J2.91	IN	Signals state of right Gigabit Transceiver voltage ²⁾
EN_PLL_PWR	B2B	J2.77	OUT	Enable PLL voltage ²⁾
PG_PLL_1V8	B2B	J2.80	IN	Signals state of the SoM PLL voltage ²⁾
PLL_SEL_0	B2B	J2.93	OUT	SoM PLL clock selection ²⁾
PLL_SEL1	B2B	J2.87	OUT	SoM PLL clock selection ²⁾
PLL_FINC	B2B	J2.81	OUT	SoM PLL frequency incrementation ²⁾
PLL_FDEC	B2B	J2.94	OUT	SoM PLL frequency decrementation ²⁾
PLL_LOLn	B2B	J2.85	IN	SoM PLL loss of lock status ²⁾
PLL_RST	B2B	J2.89	OUT	SoM PLL reset ²⁾
B66_T3 / B66_T2 / B66_T1 / B66_T0	B2B	J1.141 / J1.143 / J1.145 / J1.147	IN	Control direction of IO signals (4x SE) from and to FMC via U33.
PUDC_B	DIP switch	S4A	IN	Set state of internal pull-up resistors for selected IO pins after power-up and during configuration ^{2) 3)}
-	DIP switch	S4B	-	Not connected
JTAGENB	DIP switch	S4C	IN	Select JTAG target ^{2) 3)}
12V / 5V_EN / U18.EN	DIP switch	S4D	IN	Define boot behaviour of the 5 V rail. Power for FMC, USB VBUS and Display Port are enabled during boot, or after generating 5V_EN signal.
SC2_SW1	DIP switch	S5A	IN	Set SoM Boot Mode ^{2) 3)}
SC2_SW2	DIP switch	S5B	IN	Set SoM Boot Mode ^{2) 3)}
SC2_SW4	DIP switch	S5C	IN	User definable.
SC2_SW4	DIP switch	S5D	IN	FMC_VADJ voltage selection ²⁾
PWR_BTN	Button	S1	IN	Power on carrier and SoM ²⁾
RST_BTN	Button	S2	IN	Reset carrier and SoM ²⁾
PWR_OK	ATX 24x pin	J20.8	IN	The power supply unit signals that it has passed its internal self-tests and outputs have stabilised.
PS_ON_N	ATX 24x pin	J20.16	OUT	Turn power supply unit on/off. Inverted signal logic.
HD_LED_P / HD_LED_N	Front IO panel	J10.1 / J10.3	OUT	Hard drive activity LED
PWRLED_P / PWRLED_N	Front IO panel	J10.2 / J10.4	OUT	Power / Sleep / Message waiting LED
RST_BTN	Front IO panel	J10.7	IN	Reset button
PWR_BTN	Front IO panel	J10.6	IN	Power button
SNS_SEND	HD Audio IO panel	J9.7	IN	Audio jack detection sense line
JTAG ( TCK / TDI / TDO / TMS)	B2B	J2.120 /J2.122 / J2.124 / J2.126	Signal dependent	JTAG for SoM
JTAG ( TCK / TDI / TDO / TMS)	Adapter / TE0790	J12.4 / J12.8 / J12.10 / J12.12	Signal dependent	JTAG for SoM
JTAG ( C_TCK / C_TDI / C_TDO / C_TMS)	Adapter / TE0790	J28.4 / J28.8 / J28.10 / J28.12	Signal dependent	JTAG for System Controllers and FMC
JTAG ( FMC_TCK / FMC_TMS / FMC_TDi / FMC_TDO )	FMC HPC	J5F.D29 / J5F.D33 / J5F.D30 / J5F.D31	Signal dependent	JTAG for FMC connector
CON_NTRST	Box header	J30.3	IN	JTAG reset ^{2) 4)}
CON_RTCK	Box header	J30.11		Return Test Clock pin, echos test clock signal ^{2) 4)}
CON_sRST	Box header	J30.15	IN	SoC ARM Core reset ^{2) 4)}
JTAG ( CON_TDI / CON_TMS / CON_TCK / CON_TDO )	Box header	J30.5 / J30.7 / J30.9 / J30.13	Signal dependent	Named CON_JTAG in schematic and PJTAG in firmware description. JTAG for SoM ARM core. ^{2) 4)}
MIO26 / MIO27 / MIO28 / MIO29	B2B	J3.26 / J3.27 / J3.28 / J3.29	Signal dependent	Named CON_JTAG in schematic and PJTAG in firmware description. JTAG for SoM ARM core. ^{2) 4)}
I2C ( PLL_SCL / PLL_SDA)	B2B	J2.90 / J2.92	Signal dependent	I2C for SoM PLL
I2C ( PLL_SCL / PLL_SDA)	Box header	J17.3 / J17.7	Signal dependent	I2C for SoM PLL
I2C ( I2C_SCL / I2C_SDA )	B2B	J3.102 / J3.104	Signal dependent
I2C ( PMOD_SCL / PMOD_SDA )	PMOD header P1	P1.3 / P1.9 / P1.4 / P1.10	Signal dependent
I2C ( EXT_SCL / EXT_SDA )	PMOD header P3	P3.3 / P3.9 / P3.4 / P3.10	Signal dependent
I2C ( FFA_SDA / FFA_SCL )	Pin header	J34.1 / J34.3 J15.7 / J15.8	Signal dependent	I2C Firefly
I2C ( SFP1_SDA / SFP1_SCL )	SFP+	J14.T4 / J14.T5	Signal dependent	I2C SFP+ cage 1 / J14A
I2C ( SFP2SDA / SFP2SCL )	SFP+	J14.L4 / J14.L5	Signal dependent	I2C SFP+ cage 2 / J14B
I2C ( FMC_SCL / FMC_SDA )	FMC HPC	J5F.C30 / J5F.C31	Signal dependent	I2C for FMC

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.
- INOUT: Bidirectional signal.
- Signal dependent: A Signal can have different functions and directions as part of a Bus.

²⁾ Refer to TEBF0808 CPLD Firmware / TEBF0808 CPLD for more information.
³⁾ Refer to AMD UG1085 for additional information.
⁴⁾ Refer to ARM JTAG 20 for additional information.

Controller signal.

Power and Power-On Sequence

Power Rails

Power Rail Name / Schematic Name	Connector.Pin	Direction ¹⁾	Notes
12V_input_A	J20.10 / J20.11	IN	Carrier powered via ATX supply. Over voltage and under voltage protection trigger at 13 V / 11 V.
5VSB	J20.9	IN	Alternative input for U43.
12V_input_B	J25.1	IN	Carrier powered via barrel jack (2.1 mm). Over voltage and under voltage protection trigger at 13 V / 11 V.
VCC_MOD	J1.151 / J1.153 / J1.155 / J1.157 / J1.159 J2.138 / J2.140 / J2.142 / J2.144 J2.153 / J2.154 / J2.155 / J2.156 / J2.157 / J2.158 / J2.159 / J2.160 J3.157 / J3.158 / J3.159 / J3.160	OUT	SoM main supply
1.8V	J3.43 / J3.44	OUT	IO supply
VBATT ²⁾	B1	IN	Supplied by battery.
PSBATT ²⁾	J2.125	OUT	Backup supply to SoM.
FMC_VADJ	J1.90 / J1.120 J3.15 / J3.16 J4.58 / J4.69 / J4.105 / J4.106	OUT	Supply SoM banks with variable FMC IO voltage
VREF_A_M2C	J1.108 / J4.15 / J4.88 / J5G.H1	OUT / IN	SoM IO supply, supplied via FMC.
PLL_3V3	J3.154	OUT	Supply SoM PLL.
DDR_1V2	J2.135	IN	Not used in carrier.
SI_PLL_1V8	J3.151	IN	Not used in carrier.
PS_1V8_p99	J2.99	IN	Not used in carrier.
PS_1V8_p147	J3.147	IN	Not used in carrier.
PS_1V8_p148	J3.148	IN	Not used in carrier.
PL_1V8_p91	J1.91	IN	Not used in carrier.
PL_1V8_p121	J1.121	IN	Not used in carrier.

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

²⁾ PSBATT is the LDO regulated output of VBATT.

Module power rails.

Recommended Power up Sequencing

Sequence

Net name

Recommended Voltage Range

Pull-up/down

Description

Notes

0

-

Configuration signal setup.

See Configuration and System Control Signals.

1

12V_input_A

12V_input_B

12 V (± 5 %)
5 V (± 10 %)

12 V (± 5 %)

-
-

-

Main Power supply.

Carrier power supply.

Either ATX (Input A) or power jack (Input B).

ATX 5 V supply is optional.

2

PWR_BTN

-

Power button S1

Baseboard Design Hints

Board to Board Connectors

5.2 x 7.6 cm UltraSoM+ modules use four Samtec Razor Beam LP Terminal Strip (ST5) on the bottom side.

4x REF-192552-02 (160-pins)
- ST5 Mates with SS5

5.2 x 7.6 cm UltraSoM+ carrier use four Samtec Razor Beam LP Socket Strip (SS5) on the top side.

4x REF192552-01 (160-pins)
- SS5 Mates with ST5

Features

Board-to-Board Connector 160-pins, 80 contacts per row
Ultrafine .0197" (0.50 mm) pitch
Narrow body design saves space on board
Lead style -03.5
Samtec 28+ Gbps Solution
Mates with: ST5
Insulator Material: Liquid Crystal Polymer, schwarz
Operating Temperature Range: -55°C bis +125°C
Lead-Free Solderable: Yes
RoHS Konform: Yes

Connector Stacking height

When using the standard type on baseboard and module, the mating height is 5 mm.

Other mating heights are possible by using connectors with a different height:

Order number	REF number	Samtec Number	Type	Contribution to stacking height	Comment
27219	REF192552-01	SS5-80-3.50-L-D-K-TR	Baseboard connector	3.5mm	Standard connector used on carrier
27018	REF-189545-02	SS5-80-3.00-L-D-K-TR	Baseboard connector	3 mm	Assembly option on request
27220	REF-192552-02	ST5-80-1.50-L-D-P-TR	Module connector	1.5 mm	Standard connector used on modules
27017	REF-189545-01	ST5-80-1.00-L-D-P-TR	Module connector	1 mm	Assembly option on request

Connectors.

The module can be manufactured using other connectors upon request.

Current Rating

Current rating of Samtec Razor Beam LP Terminal/Socket Strip ST5/SS5 B2B connectors is 1.5 A per pin (1 pin powered per row).

Connector Speed Ratings

The connector speed rating depends on the stacking height:

Stacking height	Speed rating
4 mm, Single-Ended	13GHz/26Gbps
4 mm, Differential	13.5GHz/27Gbps
5 mm, Single-Ended	13.5GHz/27Gbps
5 mm, Differential	20GHz/40 Gbps

Speed rating.

The SS5/ST5 series board-to-board spacing is currently available in 4mm (0.157"), 4.5mm (0.177") and 5mm (0.197") stack heights.

The data in the reports is applicable only to the 4mm and 5mm board-to-board mated connector stack height.

Manufacturer Documentation

	File	Modified
	PDF File hsc-report-sma_st5-ss5-04mm_web.pdf	May 30, 2017 by Susanne Kunath
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Technical Specifications

Absolute Maximum Ratings ^*)

Power Rail Name/ Schematic Name

Description

Min

Max

Unit

12V_input_A

Carrier powered via ATX supply.

Overvoltage protection triggers at 13 V, undervoltage protection triggers at 11 V.

0

20

V

12V_input_B

Carrier powered via barrel jack (2.1 mm).

Overvoltage protection triggers at 13 V, undervoltage protection triggers at 11 V.

0

20

V

5VSB

Only used, when the carrier is powered via an ATX supply / 12V_input_A .

0

6.5

V

Absolute maximum ratings

^*) Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Condition". Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Temperature range

Trenz Electronic classifies modules into temperature range categories by subsumption of its component data (PCB, ICs, connectors, passive components). The temperature ranges are values for ambient air temperature and do not reflect the junction temperature of individual components.

The categories are:

Modules with commercial (C) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 70 °C.
Modules with extended (E) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 85 °C.
Modules with industrial (I) temperature grade are equipped with components that cover at least the ambient temperature range of -40 °C to 85 °C.

These categories do not take into account the entire custom system consisting of:

Customer SoC design. The allowed main SoC temperature range is specified from the vendor by junction temperature using corresponding classes (C, E, I). See vendor documentation.
Cooling solution, active and or passive cooling.
Climate or environmental conditions besides ambient temperature range.
Module orientation, neighbouring assemblies, neither other heat sources nor the SoC as heat source to other components.

Classification of the module can be looked up here: Article Number Information i.e.: TExxxx-xx-xx'I'xx, the 'I' indicates that all components are at least in Industrial temperature class.

The temperature of individual components should not exceed the specified range due to self-heating or heating by adjacent components. The actual operating temperature range will depend on the customer design, usage, environment and cooling solution. Consult Cooling Solutions for more information.

Voltage rails

The following table aims to be generic for all variants. The voltage ranges are consistend across assembly variants, but exceptions are possible (custom request).

Parameter	Min	Max	Units	Reference Document
12V_input_A	11.4	12.6	V	Schematic
12V_input_B	11.4	12.6	V	Schematic
5VSB	4.5	5.5	V	Schematic

Recommended operating conditions.

Physical Dimensions

Module size: 170 mm x 170 mm / Mini-ITX form factor. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 5 mm.
PCB thickness: 1.926 mm ± 10 %.

Physical Dimension

Currently Offered Variants

Trenz shop TEBF0808 overview page
English page	German page

Trenz Electronic Shop Overview

Revision History

Hardware Revision History

The hardware revision number can be found on the PCB board together with the module's model number, separated by a dash.

Board hardware revision number.

Date	Revision	Changes	Documentation Link
2024-07	REV05	Q1, Q2 and Q3 changed to MP5077GG (previous Load Switch is EOL), and their external components added. U2 changed to SDINBDG4-8G-XI2 (previous eMMC is EOL). R14 changed to 2KΩ. Testpoints added to PGoods of U18, U22, U26 and U29. D8 and D10 updated (previous LEDs are EOL). FAN MP1 changed to MF40060V2-1000U-A99 (previous FAN is EOL). U54 alternative-FAN Controller LM96163CISD/NOPB and its external components added and default set as not fitted. Hardware (screws and nuts) for new FMC FAN updated. J19 Connector changed to 4 Position type 2,54mm pitch. Module orientation mark placed in Silkscreen Top Side. R164 pull-up resistor on PGood of U19 added. R41 changed to 200K and made it fitted in Default variant. Also R40 changed to 0R. C93/C94 Capacitors changed to 0R Resistors (now R263/R264). U56 (new) Differential 1:2 LVDS to HCSL Buffer NB3L202KMN and its peripheral components added. One U56 Buffered PCIe REFCLK Output connected to PS-GT BANK input MGTCLKREF in modules, as the U6 Oscillator was eliminated. C179, C182, C185, C221, C222 and C223 Multipurpose MGT CLKs capacitors changed to 10nF. C69 and C70 changed to 220nF. T12 added as a Temperature Sensor and connected to U54 and default set as not fitted.. L25 added. U55 added and default set as not fitted.. C207, C39 and C82 changed to 10μF and 10V Voltage Rating. U8 (FMC_VADJ) changed to MPM3650CGQW-Z (previous Regulator is EOL). U19 (1.8V) changed to MPM3650CGQW-Z (previous Regulator is EOL). U28 (1.2V) changed to MP2164GG (previous Regulator is EOL). U43 (3V3SB) changed to MP2164GG (previous Regulator is EOL). VID circuit for U8 (FMC_VADJ) implemented for 1.2V, 1.5V and 1.8V selection only. Differential Pair Impedance Directive D90 set in PCIe RX and TX signal paths. C121, C122, C123 and C124 FMC MGT CLKs capacitors changed to 10nF. C197, C200, C202 and C203 SATA Capacitors changed to 10nF. C72 and C73 changed to capacitors with a minimum of 10V Voltage Rating. C263 capacitor added. Fuses F1 and F2 added to inputs: 12V_input_A and 12V_input_B. R65 set to 1KOhm in all existing variants. Power overview added. I2C net (SC_SDA, SC_SCL) for FMC FAN Controller connected to U27 and its slave address label added. L8, L9, L11 and L12 changed to 4.7uH. C47, C48, C50, C52, C57, C58, C60 and C62 changed to 100nF. C49, C51, C59 and C61 changed to 22uF. J14 SFP+ connectors and R18, R21, R87, R115, R121, R122 (now 7K5) sourced from 3.3V_PER. Also, R86, R114 and R113, R123 (now 7K5) sourced from VCCT and VCCR respectively. All others pull-ups eliminated from J14. Differential Pair Impedance Directive D100 set where applicable. CAN Bus Differential Pair Impedance Directive set to 120Ohms (H and L netnames modified to match). Differential Signal IN2_P/N renamed to IN2_CLK_P/N. C16 and C17 set as not fitted in all variants. J6 pin connections updated 1-to-1 as follows: RX1P/N >> B128_RX0_P/N, RX2P/N >> B128_RX1_P/N RX3P/N >> B128_RX2_P/N, RX4P/N >> B128_RX3_P/N, TX1P/N >> B128_TX0_P/N, TX2P/N >> B128_TX1_P/N TX3P/N >> B128_TX2_P/N, TX4P/N >> B128_TX3_P/N. J21 pin connections updated 1-to-1 as follows: FF_L1_TX to FF_L1_RX, FF_L2_TX to FF_L2_RX, FF_L3_TX to FF_L3_RX, FF_L4_TX to FF_L4_RX. Signals PWROK and PSON in connector J20 renamed to PWR_OK and PS_ON_N accordingly T7, T8, T9 and corresponding resistors added. Shield of all J7 connectors (USB and ETH) tied together to FGND net. Shield of J13 connected to FGND2 net. Cage of J14 connected to FGND3 net. PCB Rules updated. Signals layout updated. LayerStack improved. Polygons updated. UKCA marking added. U18 (5V) changed to MPM3683GMN-10 (previous Regulator is unavailable for order). U22 (VCC_MOD) changed to MPM3650CGQW-Z (previous Regulator is unavailable for order). U26 (3V3_PCI) changed to MPM3650CGQW-Z (previous Regulator is unavailable for order). U29 (3V3_PER) changed to MPM3650CGQW-Z (previous Regulator is unavailable for order). PSBATT circuit updated and U37 changed to 1.2V LDO. D16 (VBATT) changed to BAS70-05W. TVS diode D19 added and D11 relocated and both changed to SMBJ20CA for inputs: 12V_input_A and 12V_input_B VCC capacitor added to U32/U33/U34/U38/U44. R293 pull-up resistor added to RESET pin in U16. Table of I2C addresses and Power Voltage Ranges added. Variant "A" eliminated. Schematic Sheets Template updated. Block Design updated. R27 and R196 changed to 100R. R98 and R198 set as not fitted in all variants. R235-C211 and R236-C213 Debounce Circuits added to S1 and S2 accordingly. Signal 5VSBIN renamed to 5VSB. Signal 3.3V_MOD renamed to VCC_MOD. Pull-up resistors R228, R229, R230, R231, R232, R233, R234 added to signals PRSNT1, PRSNT, WAKE, PRSNT2, PRSNT3, PRSNT4 and PRSNT5 in PCIe J11	REV5 PCN
2016-10	REV04	1. P and N lanes swapped in FMC clock signal pairs B228_CLK0 and B229_CLK0 2. Added additional FAN connector (J35) 3. New control circuit for external beeper 4. Layout and routing improvements – 10.08.2018: 5. Resistors R130-131, R173-174 replaced from 4.99k to 2k – 26.03.2019 6. VY: Resistor R65 replaced from 8.06k to 1k (assambly variant "A") 7. VY: Page 21: EEPROM I2C address correction 8. VY: Clock source U6 (100Mhz) polulated (assambly variant "A") – 20.05.2020 9. VY: PCB: updated company address at silckscreen overlay – 13.07.2020 10. VY: Replaced ESD protection U11, U20, U49..51 to CPDA10R3V3U-HF (was: ESD3V3U4ULCE6327XTSA1) – 24.11.2021 11. Added screws on B2B and FMC pages 12. Set Track it pad to not fitted (EOL)	REV4 PCN
20116-08	REV03	Added 2.5V option for clock source U45 Net B64_T0 terminared via 240 Ohm resistor to GND. Nets B64_T1..T3 connected to CPLD Nets SFP#_LOS and SFP#TX_DIS connected to CPLD (# = 1..2) Added 4-pin connector for FAN2 (12V). Added high side switch like option for FAN without control signals. Added net SC_IO8 between CPLD1 and CPLD2 (Bank 3V3_SB) Deleted USB3.0 port (J18) Port USB2.0 replaced to USB3.0 (J8, front panel) Replaced USB HUB USB5537B to CYUSB3324 (U4)	REV03
2016-03	REV02		REV2
-	REV01	Initial revision

Hardware Revision History

Document Change History

Date	Revision	Contributors	Description
2026-03-09	v.99	Kilian Jahn	Updated to TRM Template 4.3.6 Updated to Hardware Revision 05 Added in Power Rails missing entries for carrier supply
2019-12-03	v.97	John Hartfiel	System Controller links fixed
2019-09-03	v.96	Thomas Steffens	correction EEPROM Designator correction typ U25 CLK
2018-07-02	v.89	Martin Rohrmüller	Typo
2018-05-31	v.88	John Hartfiel	Typo correction Table 13 Typo correction Table 9
2017-11-15	v.86	Ali Naseri	DIP-switches section revised and updated
2017-11-13	v.82	Ali Naseri	updated B2B connector max. current rating per pin
2017-11-13	v.80	John Hartfiel	rework B2B section
2017-10-19	v.79	Ali Naseri	added additionally MGT lanes information
2017-10-18	v.75	Ali Naseri	added Power Rails section
2017-08-29	v.70	John Hartfiel	update document change history published
2017-08-28	v.69	Ali Naseri	Initial document
--	all	Thomas Brünger , Ali Naseri , GH , John Hartfiel , Kilian Jahn , Martin Rohrmüller , Thorsten Trenz	--

Table 36: Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Product Disclaimer

Products (incl. Software and Firmware) are exclusively designed, manufactured, and distributed for industrial applications. They are not intended, authorized, or certified for use in critical safety applications, medical devices, aerospace, nuclear, life-support, traffic-control, military, or other environments where malfunction or failure could result in personal injury, death, or significant property or environmental damage.

Trenz Electronic GmbH (“Manufacturer”) excludes any liability for inappropriate use in such contexts. The Customer bears all responsibility for verifying suitability and compliance with applicable regulations when deploying in any critical-use scenario. The Customer also agrees to indemnify and hold harmless the Manufacturer from any third-party claims or liabilities arising from such use.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.

2025-08-01

Trenz Electronic Documentation

TEBF0808 TRM

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Signals, Interfaces and Pins

Connectors

Test Points

On-board Peripherals

System Controller

ETH PHY

USB 3.0 PHY

USB 2.0 PHY

HD Audio

FMC connector

SDIO switch

Fan controller 1)

Smart Fan switch 1)

I2C switch

I2C switch

EEPROM

EEPROM with MAC

PMOD

IO Expander

XMOD / TE0790

Bus transceiver

Clock Generator

Clock Fanout

Oscillator programmable 1)

Crystal

Oscillator