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Scroll Title |
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anchor | Table_OV_IDS |
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title | Initial delivery state of programmable devices on the module |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Storage Device | Symbol | Content |
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Quad SPI Flash | U13 | Not Programmed | EEPROM | U11 | Not Programmed |
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Configuration Signals
Page properties |
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- Overview of Boot Mode, Reset, Enables,
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Boot Mode
Scroll Title |
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anchor | Table_OV_BP |
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title | Boot process. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | FPGA Bank | Pin | B2B | Signal State | Boot Mode |
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Boot_R | 500 | E4 | J2-11 | Low | QSPI | High | SD Card |
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Reset
Zynq-7020SoC includes a reset that is driven by the reset system. Hardware resets are driven by the power-on reset signal (Reset) connected to carrier and the system reset signal (PS_SRST_B) connected to VMIO, it means after power on the PS will be reset.
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