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  • PetaLinux
  • SD
  • 2x ETHUSB
  • I2C
  • RTCFMeter

Revision History

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IssuesDescriptionWorkaroundTo be fixed version
UBoot ETH PHY AddressPHY Address is not set correctly for UBootNo known issues---------

Linux Message: "macb ... .ethernet eth...: unable to generate target frequency: 25000000 Hz"

This can be ignored, ETH works.  

Requirements

Software

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SoftwareVersionNote
Vivado2017.12needed
SDK2017.12needed
PetaLinux2017.12neededSDx

Hardware

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Hardware

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Basic description of TE Board Part Files is available on TE Board Part Files.

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Module ModelBoard Part Short NameNotes
   
   
   
TE0728-03-1Q03_1qSupports PCB REV01,02,03
TE0728-04-1Q04_1q 

Design supports following carriers:

Carrier ModelNotes
---TEB0728 

Additional HW Requirements:

Additional HardwareNotes
USB Cable for JTAG/UART 
XMOD Programmer 

Content

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SDSoC
TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib		Vivado Project will be generated by TE Scripts
SDK/HSI<design name>/sw_libAdditional Software Template for SDK/HSI and apps_list.csv with settings for HSI
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration

Additional Sources

..SDSoCPFM
TypeLocationNotes
init.sh<design name>/misc/init_SDSoC Platform will be generated by TE Scripts or as separate download

Additional Sources

scriptAdditional
TypeLocationNotes
SI5345<design name>/misc/Si5338SI5345 Project with current PLL Configuration
init.sh<design name>/misc/init_scriptAdditional Initialization Script for Linux

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File

File-Extension

Description

BIF-File*.bifFile with description to generate Bin-File
BIN-File*.binFlash Configuration File with Boot-Image (Zynq-FPGAs)
BIT-File*.bitFPGA (PL Part) Configuration File
Diverse Reports---Report files in different formats
Hardware-Platform-Specification-FilesDebugProbes-File*.ltxhdfDefinition File for Vivado/Vivado Labtools Debugging Interface

Debian SD-Image

*.img

Debian Image for SD-Card

Diverse Reports---Report files in different formats
Hardware-Platform-Specification-Files*.hdfExported Vivado Hardware Specification for Exported Vivado Hardware Specification for SDK/HSI and PetaLinux
LabTools Project-File*.lprVivado Labtools Project File

MCS-File

*.mcs

Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

MMI-File

*.mmi

File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)

OS-Image*.ubImage with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
Software-Application-File*.elfSoftware Application for Zynq or MicroBlaze Processor Systems

SREC-File

*.srec

Converted Software Application for MicroBlaze Processor Systems

Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

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Reference Design is available on:

Design Flow

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Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunchfor first lunch.

MIO Bank 501 Power is Carrier depends and set to 3.3V. Please check Settings, if you use a own carrier.

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

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  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported HDF
    1. HDF is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
        Note: run init_config.sh before you start petalinux config. This will set correct temporary path variable.
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\default" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\default"
  8. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects

SDSoC (only tested on Win OS)

  1. Generate Platform Project or use prebuilt from download
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Launch

Programming

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  1. Open Serial Console (e.g. putty)
    1. Speed: 115200
    2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
  2. Linux Console:
    Note: Wait until Linux boot finished For Linux Login use:
    1. User Name: root
    2. Password: root
  3. You can use Linux shell now.
    1. I2C 0 Bus type: i2cdetect -y -r 0
    2. ETH0 works with UDHCPC
    3. ETH1 must be configured manually
      1. ifconfig eth1 up
      2. ifconfig eth1 <ip>
        Note for Ping test disable ETH0
    4. RTC check: dmesg | grep rtc

 

System Design - Vivado

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