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Scroll Title |
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anchor | Table_SIP_B2B_Eth |
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title | Ethernet PHY B2B connectors. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Schematic | ETH1 | ETH2 | Direction | Pullup | Notes |
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CTREF | J3-57 | J3-25 | In |
| Magnetics center tap voltage | TD+ | J3-58 | J3-28 | Out | on-board | Transfer | TD- | J3-56 | J3-26 | Out | on-board |
| RD+ | J3-52 | J3-22 | In | on-board |
| RD- | J3-50 | J3-20 | In | on-board |
| LED1 | J3-55 | J3-23 | Out | on-board |
| LED2 | J3-53 | J3-21 | Out | on-board |
| LED3 | J3-51 | J3-19 | Out | on-board |
| POWERDOWN/INT | L21 | R20 | In | on-chip |
| RESET_N | M15 | R16 | In | on-chip | Active low PHY Reset |
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CAN pins connections to Board to Board (B2B).
Scroll Title |
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anchor | Table_SIP_B2B_CAN |
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title | CAN B2B connectors. |
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|
Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
---|
widths | |
---|
sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Schematic | B2B | Voltage Level | Notes |
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CANH | J1-2 | Magnetics center tap voltageon-board
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JTAG Interface
JTAG access to the Xilinx XA7Z020 FPGA through B2B connector JM2.
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