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| Designator | Color | Connected to | Active Level | IO Standard |
|---|---|---|---|---|
| D9 | Green | DONE | Low | not applicable |
| D8 | RED | MIO7 | High | LVCMOS33 |
| D4 | Green | PL pin V18 | High | LVCMOS33 |
512 Mbyte DDR3L SDRAM
The TE0728 SoM has two 512 GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number: NT5CC256M16DP-DI
- Supply voltage: 1.35V
- Speed: 1600 Mbps
- Temperature: 0C~95C
Configuration of the DDR3 memory controller in the FPGA should be done using the MIG tool in the Xilinx Vivado Design Suite IP catalog.
Ethernet
There are two 100 MBit Extreme Temperature Ethernet PHY's DP83848YB on the board. Datasheet is available from TI, Literature number SNLS208H. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz source is provided from MEMS Oscillator. All LED outputs have on-board pull-ups. Outputs to Magnetics have also required termination resistors on board.
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