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| Scroll Title |
|---|
| anchor | Table_SIP_JTG |
|---|
| title | JTAG pins connection |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
JTAG Signal | B2B Pin |
|---|
| TMS | J2-12 | | TDI | J2-10 | | TDO | J2-8 | | TCK | J2-6 |
|
MIO Pins
| Scroll Title |
|---|
| anchor | Table_OBP_MIOs |
|---|
| title | MIOs pins |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| MIO Pin | Schematic | B2B | Direction | Pullup | Notes |
|---|
| MIO0 | MIO0 | - |
| Enable | RTC interrupt | | MIO1 | SPI_CS | - | Out | Enable | SPI Flash | | MIO2-5 | SPI_DQ0..SPI_DQ3/M0...M3 | - | Inout | Disable | SPI Flash | | MIO6 | SPI_SCK/M4 | - | Out | Disable | SPI Flash clock | | MIO7 | LED RED | - | Out | Disable | LED | | MIO8 | TX | - | Out | Disable | CAN Transceiver | | MIO9 | RX | - | Out | Enable | CAN Transceiver | | MIO10 | IO_0 | J1-7 | Inout | Enable | GPIO | | MIO11 | IO_1 | J1-9 | Inout | Enable | GPIO | | MIO12 | IO_2 | J1-11 | Inout | Enable | GPIO | | MIO13 | IO_3 | J1-13 | Inout | Enable | GPIO | | MIO14 | SCL | - | Inout | Enable | I2C | | MIO15 | SDA | - | Inout | Enable | I2C | | MIO16 | - | J2-17 | Inout | Enable | GPIO | | MIO17 | - | J2-18 | Inout | Enable | GPIO | | MIO18 | - | J2-27 | Inout | Enable | GPIO | | MIO19 | - | J2-23 | Inout | Enable | GPIO | | MIO20 | - | J2-28 | Inout | Enable | GPIO | | MIO21 | - | J2-22 | Inout | Enable | GPIO | | MIO22 | - | J2-26 | Inout | Enable | GPIO | | MIO23 | - | J2-20 | Inout | Enable | GPIO | | MIO24 | - | J2-24 | Inout | Enable | GPIO | | MIO25 | - | J2-21 | Inout | Enable | GPIO | | MIO26 | - | J2-25 | Inout | Enable | GPIO | | MIO27 | - | J2-19 | Inout | Enable | GPIO | | MIO28 | Tx_clk | J2-51 | Out | Enable | ETH | | MIO29 | Txd0 | J2-44 | Out | Enable | ETH | | MIO30 | Txd1 | J2-49 | Out | Enable | ETH | | MIO31 | Txd2 | J2-43 | Out | Enable | ETH | | MIO32 | Txd3 | J2-42 | Out | Enable | ETH | | MIO33 | Tx_ctl | J2-46 | Out | Enable | ETH | | MIO34 | Rx_clk | J2-48 | In | Enable | ETH | | MIO35 | Rxd0 | J2-47 | In | Enable | ETH | | MIO36 | Rxd1 | J2-41 | In | Enable | ETH | | MIO37 | Rxd2 | J2-52 | In | Enable | ETH | | MIO38 | Rxd3 | J2-45 | In | Enable | ETH | | MIO39 | Rx_ctl | J2-50 | In | Enable | ETH | | MIO40 | CLK | J2-34 | Inout | Disable | SD on carrier | | MIO41 | Cmd | J2-29 | Inout | Disable | SD on carrier | | MIO42 | Data0 | J2-37 | Inout | Disable | SD on carrier | | MIO43 | Data1 | J2-40 | Inout | Disable | SD on carrier | | MIO44 | Data2 | J2-32 | Inout | Disable | SD on carrier | | MIO45 | Data3 | J2-31 | Inout | Disable | SD on carrier | | MIO46 | wp | J2-35 | In | Enable | SD on carrier | | MIO47 | cd | J2-33 | In | Enable | SD on carrier | | MIO48 | MIO48 | J2-30 | Out | Enable | LED Red on Carrier | | MIO49 | MIO49 | J2-38 | Out | Enable | LED Yellow on Carrier | | MIO50 | MIO50 | J2-36 | Out | Enable | LED Green on Carrier | | MIO51 | MIO51 | J2-39 | Inout | Disable | GPIO | | MIO52 | UART_Txd | J2-15 | Out | Enable | UART transfer | | MIO53 | UART_Rxd | J2-16 | In | Enable | UART receive |
|
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| Scroll Title |
|---|
| anchor | Table_OBP_EEP |
|---|
| title | I2C EEPROM interface MIOs and pins |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| MIO Pin | Schematic | Pin | Notes |
|---|
| MIO15 | SDA | U11-3 | On-board RTC, and EEPROM | | MIO14 | SCL | U11-1 | On-board RTC, and EEPROM |
|
LEDs
| Scroll Title |
|---|
| anchor | Table_OBP_LED |
|---|
| title | On-board LEDs |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Schematic | Color | Connected to | Active Level | IO Standard |
|---|
| D9 | Green | DONE | Low | not applicable | | D8 | RED | MIO7 | High | not applicable | | D4 | Green | Bank 33 - V18 | High | LVCMOS33 |
|
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The TE0728 SoM has two volatile DDR3 SDRAM IC for storing user application code and data.
Configuration of the DDR3 memory controller in the FPGA should be done using the MIG tool in the Xilinx Vivado Design Suite IP catalog.
Ethernet
There are two 100 MBit Extreme Temperature Ethernet provided by Texas Instrument on the board. Datasheet is provided at TI website. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz source is provided from MEMS Oscillator. There is no sharing of signals for the two PHY's.
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