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On-board QSPI flash memory S25FL127SABMFV10 is used to store initial FPGA configuration. Datasheet is provided herein Texas Instruments. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
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Quad SPI Flash (U7) is connected to the Zynq PS QSPI0 interface via PS MIO bank 500.
| MIO Pin |
|---|
| Schematic | U13 Pin | Notes |
|---|---|---|
| MIO1 | SPI_CS |
| A1 | |||
| MIO2 | SPI_DQ0/M0 | A2 | |
| MIO3 | SPI_DQ1/M1 | F6 | |
| MIO4 | SPI_DQ2/M2 | E4 | |
| MIO5 | SPI_DQ3/M3 | A3 | |
| MIO6 | SPI_SCK/M4 | A4 |
RTC I2C
The RV-3029-C3 is an ultra miniature Real-Time-Clock Module with embedded Crystal. This RTC has an I2C Bus (2-wire SerialInterface) and offers temperature compensated time. The STC-Smart Temperature Compensation is calibrated in the factory and leads to a very high time-accuracy of ± 6ppm from -40°C to +85°C and ± 8ppm from -40°C to +125°C.
| MIO Pin | SchematicMIO | U7 Pin | Pull up/down | Notes | Notes | |
|---|---|---|---|---|---|---|
| MIO15 | SDA | 5 | I2C0_SDA | MIO15 | UpOn-board RTC, and EEPROM | |
| MIO14 | I2C0_SCL | MIO146 | Up4 | On-board RTC, and EEPROM |
EEPROM
The Microchip Technology Inc. 24LC64 is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. Lowvoltage design permits operation down to 1.7V, with standby and active currents of only 1 μA and 3 mA, respectively. It has been developed for advanced, lowpower applications such as personal communications or data acquisition. The 24LC64 also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space.
| MIO Pin | SchematicMIO | U11 Pin | Pull up/down | NotesNotes |
|---|---|---|---|---|
| MIO15 | I2C0_SDAMIO15 | 3 | Up | On-board RTC, and EEPROM |
| MIO14 | I2C0_SCLMIO146 | 1 | Up | On-board RTC, and EEPROM |
LEDs
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The SN65HVD230Q, controller area network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is avaiable in Texas Instrumens website. They are intended for use in applications employing the CAN serial communication physical layer in accordance with the ISO 11898 standard. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps. Temperature must be in range of -40C~125C.to 1 Mbps. Temperature must be in range of -40C~125C.
| MIO Pin | Schematic | U16 Pin | Notes |
|---|---|---|---|
| MIO8 | D | 1 | |
| MIO9 | R | 4 |
| Schematic | B2B | Pull UP/Down | Notes |
|---|---|---|---|
| CANH | J1-2 | on-board | |
| CANL | J1-4 | on-board |
Low Quiescent Current Programmable Delay Supervisory Circuit
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| Parameter | Min | Max | Units
Recommended Operating Conditions
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| Parameter | Min | Max | Units | Reference Document |
|---|---|---|---|---|
| VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. |
| Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
| Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
| I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
| Storage Temperature | -65 | 150 | °C | See Xilinx DS187 datasheet. |
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