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Name | Direction | Pin | Description |
---|---|---|---|
ACBUS4 | in | 96 | |
ACBUS5 | in | 88 | |
ADBUS4 | out | 98 | |
ADBUS7 | out | 97 | |
BDBUS0 | inout | 87 | Module UART0.RX << FTDI |
BDBUS1 | inout | 86 | Module UART0.TX >> FTDI |
C_TCK | out | 81 | JTAG FTDI |
C_TDI | out | 84 | JTAG FTDI |
C_TDO | in | 83 | JTAG FTDI |
C_TMS | out | 85 | JTAG FTDI |
CM0 | in | 67 | DIP Switch S3-M1 |
CM1 | in | 66 | DIP Switch S3-M2 |
EN_FMC | out | 35 | VADJ Power on |
EN1 | out | 53 | |
JTAGEN | -- | 82 | Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access) DIP Switch S3-JTAGEN |
JTAGMODE | out | 58 | Enable JTAG access to CPLD for Firmware update on module CPLD (zero: JTAG routed to module FPGA, one: Module CPLD access) / currently_not_used (FPGA access only) |
M_TCK | in | 91 | JTAG Module |
M_TDI | in | 94 | JTAG Module |
M_TDO | out | 95 | JTAG Module |
M_TMS | in | 90 | JTAG Module |
MIO10 | inout | 32 | RGPIO BUS |
MIO11 | inout | 31 | RGPIO BUS |
MIO12 | inout | 39 | RGPIO BUS |
MIO13 | inout | 34 | RGPIO BUS |
MIO14 | inout | 40 | Module UART0.RX << BDBUS0 |
MIO15 | inout | 30 | Module UART0.TX >> BDBUS1 |
MODE | out | 28 | Boot Mode for Zynq Devices (Flash or SD) |
NOSEQ | inout | 29 | |
PGOOD | inout | 27 | |
PHY_LED1 | out | 45 | |
PHY_LED1_A | out | 49 | / currently_not_used |
PHY_LED2 | out | 47 | |
PHY_LED2_A | out | 48 | / currently_not_used |
POK_FMC | 36 | / currently_not_used | |
RESIN | out | 54 | |
S1 | in | 75 | |
S2 | in | 74 | Global Reset |
SD_DETECT | in | 42 | |
SD_WP | in | 43 | |
ULED1 | out | 78 | LED |
ULED2 | out | 77 | LED |
ULED3 | out | 76 | LED |
ULED4 | out | 65 | LED |
ULED5 | out | 71 | LED |
ULED6 | out | 70 | LED |
ULED7 | out | 69 | LED |
ULED8 | out | 68 | LED |
USB_OC | in | 99 | |
USR0 | in | 64 | DIP Switch S4-1 / RGPIO Bus (PCB REV04 only) |
USR1 | in | 61 | DIP Switch S4-2 / RGPIO Bus (PCB REV04 only) |
USR2 | in | 60 | DIP Switch S4-3 / RGPIO Bus (PCB REV04 only) |
USR3 | in | 59 | DIP Switch S4-4 / RGPIO Bus (PCB REV04 only) |
VID0 | out | 37 | VADJ Voltage selection (EN5335QI ) |
VID1 | out | 38 | VADJ Voltage selection (EN5335QI ) |
VID2 | out | 41 | VADJ Voltage selection (EN5335QI ) |
X6 | in | 19 | RGPIO Bus |
Y0 | 15 | / currently_not_used | |
Y1 | 14 | / currently_not_used | |
Y2 | in | 13 | RGPIO CLK |
Y3 | out | 10 | RGPIO TX |
Y4 | in | 9 | RGPIO RX |
Y5 | 8 | / currently_not_used | |
Y6 | in | 7 | RGPIO Bus |
JTAGENB set CPLD into the Chain for Firmware update. In normal mode every FMC JTAG will be set into the chain, when his FMCx_PRSNT is detected.
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